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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-06-22 09:21:18 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-02 15:56:40 +0000 |
| commit | 68ec3eb1f0447ab5bc300d1a510e499d3512d5f7 (patch) | |
| tree | 874974948eab59f6358698cdc3b7f1aaf7dd7d32 /src/soc/amd/stoneyridge/southbridge.c | |
| parent | b9aaa337221867f6a6af03b4f81bd46b95b605c3 (diff) | |
| download | coreboot-68ec3eb1f0447ab5bc300d1a510e499d3512d5f7.tar.gz coreboot-68ec3eb1f0447ab5bc300d1a510e499d3512d5f7.tar.bz2 coreboot-68ec3eb1f0447ab5bc300d1a510e499d3512d5f7.zip | |
src: Move 'static' to the beginning of declaration
Change-Id: I9b2cc1bb58922d9e32202ea4c20b9aacfe308bad
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/southbridge.c')
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index d7a09aaf57d0..855679077233 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -43,7 +43,7 @@ * waiting for each device to become available, a single delay will be * executed. */ -const static struct stoneyridge_aoac aoac_devs[] = { +static const struct stoneyridge_aoac aoac_devs[] = { { (FCH_AOAC_D3_CONTROL_UART0 + CONFIG_UART_FOR_CONSOLE * 2), (FCH_AOAC_D3_STATE_UART0 + CONFIG_UART_FOR_CONSOLE * 2) }, { FCH_AOAC_D3_CONTROL_AMBA, FCH_AOAC_D3_STATE_AMBA }, @@ -115,7 +115,7 @@ void SetFchMidParams(FCH_INTERFACE *params) * amd_pci_int_defs.h, just add the pair at the end of this table. * Order is not important. */ -const static struct irq_idx_name irq_association[] = { +static const struct irq_idx_name irq_association[] = { { PIRQ_A, "INTA#" }, { PIRQ_B, "INTB#" }, { PIRQ_C, "INTC#" }, |