summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/alderlake/Kconfig
diff options
context:
space:
mode:
authorFelix Singer <felixsinger@posteo.net>2023-06-03 06:12:57 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2023-08-20 02:19:36 +0000
commit52fb64be42f3bade7d8a7b1bddc6e980fc209430 (patch)
tree8c2a0916f0ff0f55748665fac701c4b19e287587 /src/soc/intel/alderlake/Kconfig
parentb61ee16fb3a6d7dd0acc788b36cae66709360bdf (diff)
downloadcoreboot-52fb64be42f3bade7d8a7b1bddc6e980fc209430.tar.gz
coreboot-52fb64be42f3bade7d8a7b1bddc6e980fc209430.tar.bz2
coreboot-52fb64be42f3bade7d8a7b1bddc6e980fc209430.zip
soc/intel/alderlake_n: Allow using the microcode repo
Allow users of Alderlake N processors to use the microcode repository and also add their related microcode blob to the list of microcodes which should be included in the coreboot rom. Change-Id: I11c9cb13fa81118bfcb819bad5fb39731c7e3e76 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75632 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Diffstat (limited to 'src/soc/intel/alderlake/Kconfig')
-rw-r--r--src/soc/intel/alderlake/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 5facb85339a9..406e03c24ce5 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -111,7 +111,6 @@ config SOC_INTEL_ALDERLAKE_PCH_M
config SOC_INTEL_ALDERLAKE_PCH_N
bool
select SOC_INTEL_ALDERLAKE
- select MICROCODE_BLOB_UNDISCLOSED
help
Choose this option if your mainboard has a PCH-N chipset.