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| author | V Sowmya <v.sowmya@intel.com> | 2021-06-21 10:03:53 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-07-01 13:41:55 +0000 |
| commit | 844dcb3725fc95df53a7229703f5059d2c36f98e (patch) | |
| tree | fa5e77f9ce7dec8e874bda2f945bf09e11019774 /src/soc/intel/alderlake | |
| parent | c7cfe0ba54bd280b8c4a5079bb2f6e19334f6dea (diff) | |
| download | coreboot-844dcb3725fc95df53a7229703f5059d2c36f98e.tar.gz coreboot-844dcb3725fc95df53a7229703f5059d2c36f98e.tar.bz2 coreboot-844dcb3725fc95df53a7229703f5059d2c36f98e.zip | |
soc/intel/alderlake: Enable energy efficiency turbo mode
This patch enables the energy efficiency turbo mode.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I2d76c948bdc9c208f5728e305b3034fcede6f4bf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55705
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 7fe996e1f751..783d2a96d206 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -517,6 +517,8 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, s_cfg->Hwp = 1; s_cfg->Cx = 1; s_cfg->PsOnEnable = 1; + /* Enable the energy efficient turbo mode */ + s_cfg->EnergyEfficientTurbo = 1; } static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg, |