summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/common/basecode/debug/Kconfig
diff options
context:
space:
mode:
authorSridhar Siricilla <sridhar.siricilla@intel.com>2022-01-25 00:15:17 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-04-06 17:32:31 +0000
commit2c2706cceff42e019dcf0bb64fafd754ace8b707 (patch)
treeee704cd68418d7a922e33ad3dc75b00702f28877 /src/soc/intel/common/basecode/debug/Kconfig
parentbd656b4e4c46cb4d9c5601837f5e122a8b937061 (diff)
downloadcoreboot-2c2706cceff42e019dcf0bb64fafd754ace8b707.tar.gz
coreboot-2c2706cceff42e019dcf0bb64fafd754ace8b707.tar.bz2
coreboot-2c2706cceff42e019dcf0bb64fafd754ace8b707.zip
soc/intel/common: Add support to control coreboot and Intel SoC features
The patch adds a framework to control coreboot and Intel SoC features dynamically. BIOS reads control information from OEM Section in the Descriptor Region and control the developer selected features. With the feature, debug team can control the selected SoC and coreboot features without rebuilding coreboot. In order to enable the feature, SOC_INTEL_COMMON_BLOCK_DEBUG_FEATURE has to be selcted from mainboard. The OEM section starts from offset:0xf00 till end of the Descriptor Region(0xfff). BUG=b:153410586 BRANCH=None TEST=Verified CSE firmware update functionality on brya Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I5ba40926bd9ad909654f152e48cdd648b28afd62 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/soc/intel/common/basecode/debug/Kconfig')
-rw-r--r--src/soc/intel/common/basecode/debug/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/basecode/debug/Kconfig b/src/soc/intel/common/basecode/debug/Kconfig
new file mode 100644
index 000000000000..f72055b67239
--- /dev/null
+++ b/src/soc/intel/common/basecode/debug/Kconfig
@@ -0,0 +1,6 @@
+config SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE
+ bool
+ default n
+ help
+ Driver to control runtime features of Intel SoC & coreboot. For example, controlling
+ the CSE firmware update feature without rebuilding the code.