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authorBarnali Sarkar <barnali.sarkar@intel.com>2017-06-13 19:17:35 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-23 15:48:30 +0000
commit91d38a5b0e070e75f32b30cb7297a801e31282f6 (patch)
tree5f784d79ac6220ed86b0a04994b60827ab103b0b /src/soc/intel/common/block/include/intelblocks/mp_init.h
parent71dacacb748a73e44ea86ec571cc4ec9ff667d9d (diff)
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soc/intel/common/block: Add common MP Init code
This patch contains State Machine callbacks init_cpus() and post_cpu_init(). Also, it has the SOC call for CPU feature programming. Change-Id: I5b20d413c85bf7ec6ed89b4cdf1770c33507236b Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/20189 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/mp_init.h')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/mp_init.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
new file mode 100644
index 000000000000..3a021c6f8456
--- /dev/null
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -0,0 +1,72 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_INTEL_COMMON_BLOCK_MP_INIT_H
+#define SOC_INTEL_COMMON_BLOCK_MP_INIT_H
+
+#include <device/device.h>
+
+/* Supported CPUIDs for different SOCs */
+#define CPUID_SKYLAKE_C0 0x406e2
+#define CPUID_SKYLAKE_D0 0x406e3
+#define CPUID_SKYLAKE_HQ0 0x506e1
+#define CPUID_SKYLAKE_HR0 0x506e3
+#define CPUID_KABYLAKE_G0 0x406e8
+#define CPUID_KABYLAKE_H0 0x806e9
+#define CPUID_KABYLAKE_Y0 0x806ea
+#define CPUID_KABYLAKE_HA0 0x506e8
+#define CPUID_KABYLAKE_HB0 0x906e9
+#define CPUID_APOLLOLAKE_A0 0x506c8
+#define CPUID_APOLLOLAKE_B0 0x506c9
+
+/*
+ * MP Init callback function to Find CPU Topology. This function is common
+ * among all SOCs and thus its in Common CPU block.
+ */
+int get_cpu_count(void);
+
+/*
+ * MP Init callback function(get_microcode_info) to find the Microcode at
+ * Pre MP Init phase. This function is common among all SOCs and thus its in
+ * Common CPU block.
+ * This function also fills in the microcode patch (in *microcode), and also
+ * sets the argument *parallel to 1, which allows microcode loading in all
+ * APs to occur in parallel during MP Init.
+ */
+void get_microcode_info(const void **microcode, int *parallel);
+
+/*
+ * SoC Overrides
+ *
+ * All new SoC must implement below functionality for ramstage.
+ */
+
+/*
+ * In this function SOC must perform CPU feature programming
+ * during Ramstage phase.
+ */
+void soc_core_init(device_t dev, const void *microcode);
+
+/*
+ * In this function SOC must fill required mp_ops params, also it
+ * should call these mp_ops callback functions by calling
+ * mp_init_with_smm() function from x86/mp_init.c file.
+ *
+ * Also, if there is any other SOC specific functionalities to be
+ * implemented before or after MP Init, it can be done here.
+ */
+void soc_init_cpus(struct bus *cpu_bus, const void *microcode);
+
+#endif /* SOC_INTEL_COMMON_BLOCK_MP_INIT_H */