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path: root/src/soc/intel/common/block/include/intelblocks/mp_init.h
Commit message (Expand)AuthorAgeFilesLines
* soc/intel: Use common codeflow for MP initArthur Heymans2023-02-231-20/+0
* soc/intel/cmn/block/cpu: Set BIOS_DONE on all CPUsSubrata Banik2022-06-071-0/+7
* cpu/intel: Add dedicated file to grow Intel CPUIDsSubrata Banik2021-07-171-42/+1
* soc/intel/{common,alderlake}: Use generic name "Alderlake Platform"Sridhar Siricilla2021-06-111-3/+3
* soc/intel/alderlake: Update CPU and IGD Device IDsMaulik V Vaghela2021-05-141-0/+1
* soc/intel/*: Get rid of custom microcode cachingPatrick Rudolph2021-02-011-8/+0
* soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya2021-01-221-0/+1
* soc/intel/common: Add Elkhart Lake B0 CPU IDTan, Lean Sheng2020-08-271-0/+1
* soc/intel/common/block/cpu: Refactor init_cpus functionSubrata Banik2020-08-061-0/+10
* soc/intel/common: Include Alder Lake device IDsSubrata Banik2020-08-051-1/+2
* soc/intel/tigerlake: Add CPU ID for TGL B0Jamie Ryu2020-06-061-0/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/common: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* soc/intel/common: Update Jasper Lake Device IDsMeera Ravindranath2020-02-251-0/+1
* soc/intel: Remove duplicate CPUID entrySubrata Banik2020-02-041-1/+0
* soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng2020-01-221-0/+1
* src/soc/intel: Add Cometlake-S and CMP-H skusGaggery Tsai2019-12-021-1/+3
* soc/intel/common: Include Tigerlake device IDsRavi Sarawadi2019-11-051-0/+1
* soc/intel/cannonlake: Add new PCI IDsFelix Singer2019-07-301-0/+1
* soc/intel/cannonlake: Add device Ids for new CFL SKUs supportLean Sheng Tan2019-07-171-1/+2
* soc/intel: Geminilake Refresh feature request supportJohn Zhao2019-05-131-0/+1
* soc/intel/common: Include cometlake CPU IDsRonak Kanabar2019-02-241-0/+5
* soc/intel/common: Add whiskeylake celeron v-0 supportLijian Zhao2019-02-191-0/+1
* soc/intel/common: Include Icelake device IDsAamir Bohra2018-11-071-0/+2
* soc/intel/common/block: Don't use device_t in ramstageElyes HAOUAS2018-09-181-1/+1
* src/soc/intel: Add new device IDs to support coffeelakeMaulik2018-08-101-0/+2
* soc/intel/common/block: Add WhiskeyLake W0 CPUIDKrzysztof Sywula2018-07-181-0/+1
* soc/intel/cannonlake: Add support for D0 steppingLijian Zhao2017-12-111-0/+1
* soc/intel/apollolake: Add APL CPU device IDMario Scheithauer2017-11-031-0/+1
* intel/common/mp_init: Refactor MP Init code to get rid of microcode paramPratik Prajapati2017-08-211-2/+2
* intel/common/cpu: Add function to get microcode patch pointerPratik Prajapati2017-08-211-0/+8
* soc/intel/common/block: Add CNL, APL and GLK CPU device IDsBarnali Sarkar2017-08-101-0/+5
* soc/intel/common/block: Add common MP Init codeBarnali Sarkar2017-06-231-0/+72
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-16 13:55:57 +0000