diff options
author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/soc/intel/quark/romstage/car_stage_entry.S | |
parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
download | coreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.gz coreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.bz2 coreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.zip |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/quark/romstage/car_stage_entry.S')
-rw-r--r-- | src/soc/intel/quark/romstage/car_stage_entry.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/quark/romstage/car_stage_entry.S b/src/soc/intel/quark/romstage/car_stage_entry.S index b8207117fa4d..d51587143b96 100644 --- a/src/soc/intel/quark/romstage/car_stage_entry.S +++ b/src/soc/intel/quark/romstage/car_stage_entry.S @@ -29,7 +29,7 @@ car_stage_entry: /* Enter the C code */ call car_stage_c_entry -#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) +#if CONFIG(PLATFORM_USES_FSP1_1) #if !ENV_VERSTAGE #include "src/drivers/intel/fsp1_1/after_raminit.S" #endif @@ -57,7 +57,7 @@ car_stage_entry: .Lhlt: xchg %al, %ah mov $POST_DELAY, %dh -#if IS_ENABLED(CONFIG_POST_IO) +#if CONFIG(POST_IO) outb %al, $CONFIG_POST_IO_PORT #else post_code(POST_DEAD_CODE) @@ -67,7 +67,7 @@ car_stage_entry: .flash_delay: outb %al, $0xED loop .flash_delay -#if IS_ENABLED(CONFIG_ENABLE_DEBUG_LED) +#if CONFIG(ENABLE_DEBUG_LED) movl $SD_HOST_CTRL, %ebx movb 0(%ebx), %dl xorb $1, %dl |