| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | intel/quark: Remove extra steps on entry to romstage | Kyösti Mälkki | 2019-08-30 | 1 | -72/+0 |
| * | soc/intel/fsp1.1: Implement postcar stage | Arthur Heymans | 2019-05-21 | 1 | -6/+0 |
| * | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner | 2019-03-08 | 1 | -3/+3 |
| * | soc/intel/quark: Add FSP 2.0 boot block support | Lee Leahy | 2016-08-05 | 1 | -0/+2 |
| * | soc/intel/quark: Fix car_stage_entry routine name. | Lee Leahy | 2016-08-01 | 1 | -1/+1 |
| * | soc/intel/quark: Add C bootblock | Lee Leahy | 2016-06-12 | 1 | -0/+76 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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