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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-02 08:44:37 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-08-07 19:28:56 +0000 |
| commit | 1750877ffd05074054efb8a143296074dd306d22 (patch) | |
| tree | ddd75590dc2ed78771df19c3b5264598884d22a5 /src/soc/intel/tigerlake/chip.h | |
| parent | abbfa555b02aa7c905f8cca27a22000c3bd7e47c (diff) | |
| download | coreboot-1750877ffd05074054efb8a143296074dd306d22.tar.gz coreboot-1750877ffd05074054efb8a143296074dd306d22.tar.bz2 coreboot-1750877ffd05074054efb8a143296074dd306d22.zip | |
mb/google/brya/acpi: Fix NVJT subfunction IDs
The POWERCONTROL and PLATPOLICY NVJT subfunctions were incorrectly set
to 2 and 3, respectively. While looking at the ACPI code, Nvidia noticed
these are supposed to be 3 and 4, also respectively, so this patch fixes
that.
BUG=b:214581763
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I0f808aba7072b943ee2fad20e06ff39a9b54903d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66374
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/chip.h')
0 files changed, 0 insertions, 0 deletions