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author | Subrata Banik <subrata.banik@intel.com> | 2017-11-07 17:50:48 +0530 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-11 18:20:12 +0000 |
commit | 15129b4db44fd63b1fe7076d7825c1f8bd00588d (patch) | |
tree | b47f6abc75bc3d18dda5a3973144c8fc77888d08 /src/soc/intel | |
parent | c0ec28642fea41b799d0d5e931ff896beebd325b (diff) | |
download | coreboot-15129b4db44fd63b1fe7076d7825c1f8bd00588d.tar.gz coreboot-15129b4db44fd63b1fe7076d7825c1f8bd00588d.tar.bz2 coreboot-15129b4db44fd63b1fe7076d7825c1f8bd00588d.zip |
soc/intel/apollolake: Make use of Intel SPI common block
TEST=Build and boot reef
Change-Id: I1bb22ef1737b9e35892294ec0d66df39c546d72e
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/apollolake/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 3 | ||||
-rw-r--r-- | src/soc/intel/apollolake/spi.c | 10 |
3 files changed, 3 insertions, 11 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index cf2492c509b7..f568799026ae 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -86,6 +86,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_XDCI select SOC_INTEL_COMMON_BLOCK_XHCI select SOC_INTEL_COMMON_BLOCK_SMM + select SOC_INTEL_COMMON_BLOCK_SPI select SOC_INTEL_COMMON_SPI_FLASH_PROTECT select UDELAY_TSC select TSC_CONSTANT_RATE diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index c295e36e5ebd..14932dde8433 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -57,13 +57,12 @@ ramstage-y += memmap.c ramstage-y += mmap_boot.c ramstage-y += uart.c ramstage-y += nhlt.c -ramstage-y += systemagent.c ramstage-y += spi.c +ramstage-y += systemagent.c ramstage-y += pmutil.c ramstage-y += pmc.c ramstage-y += reset.c ramstage-y += sram.c -ramstage-y += spi.c ramstage-y += xdci.c ramstage-y += sd.c diff --git a/src/soc/intel/apollolake/spi.c b/src/soc/intel/apollolake/spi.c index fecb0cfd26b8..8d9f0002260a 100644 --- a/src/soc/intel/apollolake/spi.c +++ b/src/soc/intel/apollolake/spi.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright 2016 Google Inc. + * Copyright 2017 Intel Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,11 +15,8 @@ * GNU General Public License for more details. */ -#include <console/console.h> -#include <intelblocks/fast_spi.h> #include <intelblocks/spi.h> #include <soc/pci_devs.h> -#include <spi-generic.h> int spi_soc_devfn_to_bus(unsigned int devfn) { @@ -45,9 +43,3 @@ int spi_soc_bus_to_devfn(unsigned int bus) } return -1; } - -const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { - { .ctrlr = &fast_spi_flash_ctrlr, .bus_start = 0, .bus_end = 0 }, -}; - -const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); |