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| author | Jonathan Zhang <jonzhang@fb.com> | 2022-08-08 15:38:54 -0700 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-11-08 22:55:20 +0000 |
| commit | fe17a7d4d420763ef387e84256eaed0373c25725 (patch) | |
| tree | ae5069dfc9631a2300b3437dfed03bee45310d35 /src/soc/mediatek | |
| parent | a2503fa2e9c1c69495c29c4dfb00e7413952523d (diff) | |
| download | coreboot-fe17a7d4d420763ef387e84256eaed0373c25725.tar.gz coreboot-fe17a7d4d420763ef387e84256eaed0373c25725.tar.bz2 coreboot-fe17a7d4d420763ef387e84256eaed0373c25725.zip | |
soc/intel/xeon_sp: accomodate xeon_sp FSPX_CONFIG definitions
Intel FSPs of XEON server platforms define FSPX_CONFIG
instead of FSP_X_CONFIG, which is expected by coreboot.
Re-define in the common code.
Update coreboot code to use FSP_X_CONFIG consistently.
Tested=On OCP Delta Lake, boot up OS successfully.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Change-Id: Ifa0e1efa1618fbec84f1e1f23d9e49f3b1057b32
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/mediatek')
0 files changed, 0 insertions, 0 deletions