util/spd_tools/lp4x: Add 2 new parts to global memory definition

This adds the definitions for MT53E1G32D4NQ-046 WT:E used on Majolica,
and the NT6AP256T32AV-J1 part used on Guybrush.

BUG=b:178715165
TEST=Generate SPDs

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I7cd729fc72d8f44a449429e97683b2ca1f560f2c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51057
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>

1 files changed, 26 insertions, 0 deletions

diff --git a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt
index ffb08c728d2b..fcbe624d9b02 100644
--- a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt
+++ b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt
@@ -229,6 +229,32 @@
                 "ranksPerChannel": 1,
                 "speedMbps": 4267
             }
+        },
+        {
+            "name": "NT6AP256T32AV-J1",
+            "attribs": {
+                "densityPerChannelGb": 4,
+                "banks": 8,
+                "channelsPerDie": 2,
+                "diesPerPackage": 1,
+                "bitWidthPerChannel": 16,
+                "ranksPerChannel": 1,
+                "speedMbps": 4267,
+                "tckMaxPs": 1250,
+                "casLatencies": "14 20 24 28 32 36"
+            }
+        },
+        {
+            "name": "MT53E1G32D4NQ-046 WT:E",
+            "attribs": {
+                "densityPerChannelGb": 8,
+                "banks": 8,
+                "channelsPerDie": 2,
+                "diesPerPackage": 2,
+                "bitWidthPerChannel": 16,
+                "ranksPerChannel": 2,
+                "speedMbps": 4267
+            }
         }
     ]
 }