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-rw-r--r--src/mainboard/intel/adlrvp/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index cade987313d5..57d78de9ce94 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -12,6 +12,9 @@ chip soc/intel/alderlake
register "pmc_gpe0_dw1" = "GPP_D"
register "pmc_gpe0_dw2" = "GPP_E"
+ # Enable HECI1 interface
+ register "HeciEnabled" = "1"
+
# FSP configuration
# Enable CNVi BT