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-rw-r--r--southbridge/amd/amd8111/ac97.c4
-rw-r--r--southbridge/amd/amd8111/acpi.c2
-rw-r--r--southbridge/amd/amd8111/ide.c2
-rw-r--r--southbridge/amd/amd8111/lpc.c2
-rw-r--r--southbridge/amd/amd8111/nic.c2
-rw-r--r--southbridge/amd/amd8111/pci.c2
-rw-r--r--southbridge/amd/amd8111/smbus.c2
-rw-r--r--southbridge/amd/amd8111/usb.c2
-rw-r--r--southbridge/amd/amd8111/usb2.c2
-rw-r--r--southbridge/amd/rs690/gfx.c10
-rw-r--r--southbridge/amd/rs690/gfx.dts2
-rw-r--r--southbridge/amd/rs690/ht.c3
-rw-r--r--southbridge/amd/rs690/pcie.c2
-rw-r--r--southbridge/amd/sb600/ac97.c4
-rw-r--r--southbridge/amd/sb600/hda.c2
-rw-r--r--southbridge/amd/sb600/ide.c2
-rw-r--r--southbridge/amd/sb600/lpc.c2
-rw-r--r--southbridge/amd/sb600/pci.c2
-rw-r--r--southbridge/amd/sb600/sata.c2
-rw-r--r--southbridge/amd/sb600/sm.c2
-rw-r--r--southbridge/amd/sb600/usb.c2
21 files changed, 25 insertions, 30 deletions
diff --git a/southbridge/amd/amd8111/ac97.c b/southbridge/amd/amd8111/ac97.c
index fdf6ab322e40..4893dfedac30 100644
--- a/southbridge/amd/amd8111/ac97.c
+++ b/southbridge/amd/amd8111/ac97.c
@@ -44,7 +44,7 @@ struct device_operations ac97audio = {
.device = 0x746D}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
@@ -58,7 +58,7 @@ struct device_operations ac97modem = {
.device = 0x746E}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/amd8111/acpi.c b/southbridge/amd/amd8111/acpi.c
index 28867185ee8f..9b8a7622a4ae 100644
--- a/southbridge/amd/amd8111/acpi.c
+++ b/southbridge/amd/amd8111/acpi.c
@@ -231,7 +231,7 @@ struct device_operations acpi = {
.device = PCI_DEVICE_ID_AMD_8111_ACPI}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = acpi_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = acpi_enable_resources,
diff --git a/southbridge/amd/amd8111/ide.c b/southbridge/amd/amd8111/ide.c
index b34c4f5e1552..c56339e7a3ac 100644
--- a/southbridge/amd/amd8111/ide.c
+++ b/southbridge/amd/amd8111/ide.c
@@ -78,7 +78,7 @@ struct device_operations amd8111_ide = {
.device = PCI_DEVICE_ID_AMD_8111_IDE}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/amd8111/lpc.c b/southbridge/amd/amd8111/lpc.c
index 67dcb1002d42..d66c4e54460b 100644
--- a/southbridge/amd/amd8111/lpc.c
+++ b/southbridge/amd/amd8111/lpc.c
@@ -213,7 +213,7 @@ struct device_operations amd8111_lpc = {
.device = PCI_DEVICE_ID_AMD_8111_ISA}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = amd8111_lpc_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = amd8111_lpc_enable_resources,
diff --git a/southbridge/amd/amd8111/nic.c b/southbridge/amd/amd8111/nic.c
index 004f9fde2609..baaf05a30161 100644
--- a/southbridge/amd/amd8111/nic.c
+++ b/southbridge/amd/amd8111/nic.c
@@ -99,7 +99,7 @@ struct device_operations amd8111_nic = {
.device = PCI_DEVICE_ID_AMD_8111_NIC}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/amd8111/pci.c b/southbridge/amd/amd8111/pci.c
index 5dfb46380b10..26b17a7f2775 100644
--- a/southbridge/amd/amd8111/pci.c
+++ b/southbridge/amd/amd8111/pci.c
@@ -75,7 +75,7 @@ struct device_operations amd8111_pci = {
.device = PCI_DEVICE_ID_AMD_8111_PCI}}},
.constructor = default_device_constructor,
.phase3_scan = pci_scan_bridge,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = pci_bus_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_bus_enable_resources,
diff --git a/southbridge/amd/amd8111/smbus.c b/southbridge/amd/amd8111/smbus.c
index 1b9b26fcc55a..599d174973c7 100644
--- a/southbridge/amd/amd8111/smbus.c
+++ b/southbridge/amd/amd8111/smbus.c
@@ -53,7 +53,7 @@ struct device_operations amd8111_smbus = {
.device = PCI_DEVICE_ID_AMD_8111_SMB}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/amd8111/usb.c b/southbridge/amd/amd8111/usb.c
index 8f501be07691..36028857a035 100644
--- a/southbridge/amd/amd8111/usb.c
+++ b/southbridge/amd/amd8111/usb.c
@@ -50,7 +50,7 @@ struct device_operations amd8111_usb = {
.device = PCI_DEVICE_ID_AMD_8111_USB}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
- .phase4_enable_disable = amd8111_enable,
+ .phase3_chip_setup_dev = amd8111_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/amd8111/usb2.c b/southbridge/amd/amd8111/usb2.c
index 24f9d365ee12..81f135eec481 100644
--- a/southbridge/amd/amd8111/usb2.c
+++ b/southbridge/amd/amd8111/usb2.c
@@ -49,7 +49,7 @@ struct device_operations amd8111_usb2 = {
.device = PCI_DEVICE_ID_AMD_8111_USB}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
- .phase4_enable_disable = amd8111_usb2_enable,
+ .phase3_chip_setup_dev = amd8111_usb2_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/rs690/gfx.c b/southbridge/amd/rs690/gfx.c
index cf89da1000c4..90e8d1a637bf 100644
--- a/southbridge/amd/rs690/gfx.c
+++ b/southbridge/amd/rs690/gfx.c
@@ -79,13 +79,9 @@ static void internal_gfx_pci_dev_init(struct device *dev)
struct southbridge_amd_rs690_gfx_config *cfg = dev->device_configuration;
deviceid = pci_read_config16(dev, PCI_DEVICE_ID);
vendorid = pci_read_config16(dev, PCI_VENDOR_ID);
- printk(BIOS_INFO, "internal_gfx_pci_dev_init device=%x, vendor=%x, vga_rom_address=0x%x.\n",
+ printk(BIOS_INFO, "internal_gfx_pci_dev_init device=%x, vendor=%x, vga_rom_address=0x%lx.\n",
deviceid, vendorid, cfg->vga_rom_address);
-#if 0 /* I think these should be done in Config.lb. Please check it. */
- dev->on_mainboard = 1;
- dev->rom_address = cfg->vga_rom_address; /* 0xfff00000; */
-#endif
pci_dev_init(dev);
/* clk ind */
@@ -569,9 +565,9 @@ struct device_operations rs690_gfx = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_RS690MT_INT_GFX}}},
.constructor = default_device_constructor,
- .phase2_setup_scan_bus = rs690_internal_gfx_enable,
+ .phase3_chip_setup_dev = rs690_enable,
+ .phase3_enable = rs690_internal_gfx_enable,
.phase3_scan = 0,
- .phase4_enable_disable = rs690_enable,
.phase4_read_resources = rs690_gfx_read_resources,
.phase4_set_resources = rs690_gfx_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/rs690/gfx.dts b/southbridge/amd/rs690/gfx.dts
index 43c1290c1934..4b326f88a44c 100644
--- a/southbridge/amd/rs690/gfx.dts
+++ b/southbridge/amd/rs690/gfx.dts
@@ -33,7 +33,7 @@
*/
{
device_operations = "rs690_gfx";
- vga_rom_address = "0xfff00000"; /* The location that the VGA rom has been appened. */
+ vga_rom_address = "0xfff0000";
gfx_dev2_dev3 = "1"; /* for GFX Core initialization REFCLK_SEL */
gfx_dual_slot = "0"; /* Is it dual graphics slots */
gfx_lane_reversal = "0"; /* Single/Dual slot lan reversal */
diff --git a/southbridge/amd/rs690/ht.c b/southbridge/amd/rs690/ht.c
index 4d6f6ff36f46..28d6bcb4102e 100644
--- a/southbridge/amd/rs690/ht.c
+++ b/southbridge/amd/rs690/ht.c
@@ -85,9 +85,8 @@ struct device_operations rs690_ht = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_RS690_HT}}},
.constructor = default_device_constructor,
- .phase2_setup_scan_bus = rs690_enable,
.phase3_scan = 0,
- .phase4_enable_disable = rs690_enable,
+ .phase3_chip_setup_dev = rs690_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/rs690/pcie.c b/southbridge/amd/rs690/pcie.c
index ab6444800387..bc954cd51a9c 100644
--- a/southbridge/amd/rs690/pcie.c
+++ b/southbridge/amd/rs690/pcie.c
@@ -400,7 +400,7 @@ struct device_operations rs690_pcie = {
.device = PCI_DEVICE_ID_ATI_RS690_PCIE}}},
.constructor = default_device_constructor,
.phase3_scan = pci_scan_bridge,
- .phase4_enable_disable = rs690_enable,
+ .phase3_chip_setup_dev = rs690_enable,
.phase4_read_resources = pci_bus_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_bus_enable_resources,
diff --git a/southbridge/amd/sb600/ac97.c b/southbridge/amd/sb600/ac97.c
index 5322a89ab544..0ecdbf613886 100644
--- a/southbridge/amd/sb600/ac97.c
+++ b/southbridge/amd/sb600/ac97.c
@@ -38,7 +38,7 @@ struct device_operations ac97audio = {
.device = PCI_DEVICE_ID_ATI_SB600_ACI}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
@@ -52,7 +52,7 @@ struct device_operations ac97modem = {
.device = PCI_DEVICE_ID_ATI_SB600_MCI}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/sb600/hda.c b/southbridge/amd/sb600/hda.c
index fff3d05ef558..0aa949bdf959 100644
--- a/southbridge/amd/sb600/hda.c
+++ b/southbridge/amd/sb600/hda.c
@@ -279,7 +279,7 @@ struct device_operations sb600_hda = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_SB600_HDA}}},
.constructor = default_device_constructor,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/sb600/ide.c b/southbridge/amd/sb600/ide.c
index 19116c15f79f..d7faa2c05c47 100644
--- a/southbridge/amd/sb600/ide.c
+++ b/southbridge/amd/sb600/ide.c
@@ -70,7 +70,7 @@ struct device_operations sb600_ide = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_SB600_IDE}}},
.constructor = default_device_constructor,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/sb600/lpc.c b/southbridge/amd/sb600/lpc.c
index e95ed178d439..18a260b26eb0 100644
--- a/southbridge/amd/sb600/lpc.c
+++ b/southbridge/amd/sb600/lpc.c
@@ -213,7 +213,7 @@ struct device_operations sb600_lpc = {
.device = PCI_DEVICE_ID_ATI_SB600_LPC}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = sb600_lpc_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = sb600_lpc_enable_resources,
diff --git a/southbridge/amd/sb600/pci.c b/southbridge/amd/sb600/pci.c
index fd05096af3b9..87920f25d714 100644
--- a/southbridge/amd/sb600/pci.c
+++ b/southbridge/amd/sb600/pci.c
@@ -130,7 +130,7 @@ struct device_operations sb600_pci = {
.device = PCI_DEVICE_ID_ATI_SB600_PCI}}},
.constructor = default_device_constructor,
.phase3_scan = pci_scan_bridge,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = pci_bus_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_bus_enable_resources,
diff --git a/southbridge/amd/sb600/sata.c b/southbridge/amd/sb600/sata.c
index cd0127d9cc97..b1d081853abc 100644
--- a/southbridge/amd/sb600/sata.c
+++ b/southbridge/amd/sb600/sata.c
@@ -192,7 +192,7 @@ struct device_operations sb600_sata = {
{.pci = {.vendor = PCI_VENDOR_ID_ATI,
.device = PCI_DEVICE_ID_ATI_SB600_SATA}}},
.constructor = default_device_constructor,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/sb600/sm.c b/southbridge/amd/sb600/sm.c
index 7528d1dc6b16..823f1cce3723 100644
--- a/southbridge/amd/sb600/sm.c
+++ b/southbridge/amd/sb600/sm.c
@@ -395,7 +395,7 @@ struct device_operations sb600_sm = {
.device = PCI_DEVICE_ID_ATI_SB600_SM}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = sb600_sm_read_resources,
.phase4_set_resources = sb600_sm_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
diff --git a/southbridge/amd/sb600/usb.c b/southbridge/amd/sb600/usb.c
index 214d953ad4bf..b2a4698ef51c 100644
--- a/southbridge/amd/sb600/usb.c
+++ b/southbridge/amd/sb600/usb.c
@@ -205,7 +205,7 @@ struct device_operations sb600_usb2 = {
.device = PCI_DEVICE_ID_ATI_SB600_USB2}}},
.constructor = default_device_constructor,
.phase3_scan = scan_static_bus,
- .phase4_enable_disable = sb600_enable,
+ .phase3_chip_setup_dev = sb600_enable,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = usb_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-05 23:17:00 +0000