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-rw-r--r--src/mainboard/google/brya/variants/agah/overridetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb
index 007b188ff090..550dab60fbd8 100644
--- a/src/mainboard/google/brya/variants/agah/overridetree.cb
+++ b/src/mainboard/google/brya/variants/agah/overridetree.cb
@@ -59,6 +59,12 @@ chip soc/intel/alderlake
}"
device domain 0 on
+ device ref tbt_pcie_rp0 off end
+ device ref tbt_pcie_rp1 off end
+ device ref tbt_pcie_rp2 off end
+
+ device ref tcss_dma0 off end
+ device ref tcss_dma1 off end
device ref pcie4_0 on
# Enable CPU PCIe RP 1 using CLKREQ 0 and CLKSRC 0
register "cpu_pcie_rp[CPU_RP(1)]" = "{