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Diffstat (limited to 'src/mainboard/google/stout')
| -rw-r--r-- | src/mainboard/google/stout/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index ad700cee2927..b38adaf14809 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -61,7 +61,7 @@ chip northbridge/intel/sandybridge register "gen3_dec" = "0x0001C1611" # Enable zero-based linear PCIe root port functions - register "pcie_port_coalesce" = "1" + register "pcie_port_coalesce" = "true" device pci 14.0 on end # USB 3.0 Controller device pci 16.0 on end # Management Engine Interface 1 |