1 files changed, 21 insertions, 0 deletions
diff --git a/src/mainboard/system76/tgl-h/variants/gaze16-3050/ramstage.c b/src/mainboard/system76/tgl-h/variants/gaze16-3050/ramstage.c
new file mode 100644
index 000000000000..9d985630d0f8
--- /dev/null
+++ b/src/mainboard/system76/tgl-h/variants/gaze16-3050/ramstage.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/ramstage.h>
+
+void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+{
+	params->PchLegacyIoLowLatency = 1;
+
+	// PEG0 Config
+	params->CpuPcieRpAdvancedErrorReporting[0] = 0;
+	params->CpuPcieRpLtrEnable[0] = 1;
+	params->CpuPcieRpPtmEnabled[0] = 0;
+
+	// PEG2 Config
+	params->CpuPcieRpAdvancedErrorReporting[2] = 0;
+	params->CpuPcieRpLtrEnable[2] = 1;
+	params->CpuPcieRpPtmEnabled[2] = 0;
+
+	// Remap PEG2 as PEG1
+	params->CpuPcieRpFunctionSwap = 1;
+}