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Diffstat (limited to 'src/mainboard/system76/tgl-h/variants/oryp8/ramstage.c')
-rw-r--r--src/mainboard/system76/tgl-h/variants/oryp8/ramstage.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/mainboard/system76/tgl-h/variants/oryp8/ramstage.c b/src/mainboard/system76/tgl-h/variants/oryp8/ramstage.c
new file mode 100644
index 000000000000..72ad3fc5e7db
--- /dev/null
+++ b/src/mainboard/system76/tgl-h/variants/oryp8/ramstage.c
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/ramstage.h>
+
+void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+{
+ // PEG0 Config
+ params->CpuPcieRpAdvancedErrorReporting[0] = 0;
+ params->CpuPcieRpLtrEnable[0] = 1;
+ params->CpuPcieRpPtmEnabled[0] = 0;
+
+ // PEG1 Config
+ params->CpuPcieRpAdvancedErrorReporting[1] = 0;
+ params->CpuPcieRpLtrEnable[1] = 1;
+ params->CpuPcieRpPtmEnabled[1] = 0;
+
+ // IOM config
+ params->PchUsbOverCurrentEnable = 0;
+ params->PortResetMessageEnable[8] = 1; // TYPEC1
+ params->UsbTcPortEn = 1;
+
+ // Low latency legacy I/O
+ params->PchLegacyIoLowLatency = 1;
+}