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-rw-r--r--src/northbridge/intel/e7505/Kconfig1
-rw-r--r--src/northbridge/intel/e7505/e7505.h1
-rw-r--r--src/northbridge/intel/e7505/memmap.c1
-rw-r--r--src/northbridge/intel/e7505/northbridge.c1
-rw-r--r--src/northbridge/intel/e7505/raminit.c1
-rw-r--r--src/northbridge/intel/e7505/raminit.h1
-rw-r--r--src/northbridge/intel/e7505/romstage.c1
-rw-r--r--src/northbridge/intel/gm45/Kconfig1
-rw-r--r--src/northbridge/intel/gm45/Makefile.inc1
-rw-r--r--src/northbridge/intel/gm45/acpi.c1
-rw-r--r--src/northbridge/intel/gm45/acpi/gm45.asl1
-rw-r--r--src/northbridge/intel/gm45/acpi/hostbridge.asl1
-rw-r--r--src/northbridge/intel/gm45/acpi/peg.asl1
-rw-r--r--src/northbridge/intel/gm45/bootblock.c1
-rw-r--r--src/northbridge/intel/gm45/chip.h1
-rw-r--r--src/northbridge/intel/gm45/early_init.c1
-rw-r--r--src/northbridge/intel/gm45/early_reset.c1
-rw-r--r--src/northbridge/intel/gm45/gm45.h1
-rw-r--r--src/northbridge/intel/gm45/gma.c1
-rw-r--r--src/northbridge/intel/gm45/igd.c1
-rw-r--r--src/northbridge/intel/gm45/iommu.c1
-rw-r--r--src/northbridge/intel/gm45/memmap.c1
-rw-r--r--src/northbridge/intel/gm45/northbridge.c1
-rw-r--r--src/northbridge/intel/gm45/pcie.c1
-rw-r--r--src/northbridge/intel/gm45/pm.c1
-rw-r--r--src/northbridge/intel/gm45/raminit.c1
-rw-r--r--src/northbridge/intel/gm45/raminit_rcomp_calibration.c1
-rw-r--r--src/northbridge/intel/gm45/raminit_read_write_training.c1
-rw-r--r--src/northbridge/intel/gm45/raminit_receive_enable_calibration.c1
-rw-r--r--src/northbridge/intel/gm45/romstage.c1
-rw-r--r--src/northbridge/intel/gm45/thermal.c1
-rw-r--r--src/northbridge/intel/haswell/Kconfig1
-rw-r--r--src/northbridge/intel/haswell/Makefile.inc1
-rw-r--r--src/northbridge/intel/haswell/acpi.c1
-rw-r--r--src/northbridge/intel/haswell/acpi/haswell.asl1
-rw-r--r--src/northbridge/intel/haswell/acpi/hostbridge.asl1
-rw-r--r--src/northbridge/intel/haswell/acpi/peg.asl1
-rw-r--r--src/northbridge/intel/haswell/bootblock.c1
-rw-r--r--src/northbridge/intel/haswell/chip.h1
-rw-r--r--src/northbridge/intel/haswell/early_init.c1
-rw-r--r--src/northbridge/intel/haswell/finalize.c1
-rw-r--r--src/northbridge/intel/haswell/gma.c1
-rw-r--r--src/northbridge/intel/haswell/haswell.h1
-rw-r--r--src/northbridge/intel/haswell/mchbar_regs.h1
-rw-r--r--src/northbridge/intel/haswell/memmap.c1
-rw-r--r--src/northbridge/intel/haswell/minihd.c1
-rw-r--r--src/northbridge/intel/haswell/northbridge.c1
-rw-r--r--src/northbridge/intel/haswell/pcie.c1
-rw-r--r--src/northbridge/intel/haswell/raminit.c1
-rw-r--r--src/northbridge/intel/haswell/raminit.h1
-rw-r--r--src/northbridge/intel/haswell/report_platform.c1
-rw-r--r--src/northbridge/intel/i440bx/Kconfig1
-rw-r--r--src/northbridge/intel/i440bx/Makefile.inc1
-rw-r--r--src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl1
-rw-r--r--src/northbridge/intel/i440bx/debug.c1
-rw-r--r--src/northbridge/intel/i440bx/i440bx.h1
-rw-r--r--src/northbridge/intel/i440bx/memmap.c1
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c1
-rw-r--r--src/northbridge/intel/i440bx/raminit.c1
-rw-r--r--src/northbridge/intel/i440bx/raminit.h1
-rw-r--r--src/northbridge/intel/i440bx/romstage.c1
-rw-r--r--src/northbridge/intel/i945/Kconfig1
-rw-r--r--src/northbridge/intel/i945/Makefile.inc1
-rw-r--r--src/northbridge/intel/i945/acpi.c1
-rw-r--r--src/northbridge/intel/i945/acpi/hostbridge.asl1
-rw-r--r--src/northbridge/intel/i945/acpi/i945.asl1
-rw-r--r--src/northbridge/intel/i945/acpi/igd.asl1
-rw-r--r--src/northbridge/intel/i945/acpi/peg.asl1
-rw-r--r--src/northbridge/intel/i945/bootblock.c1
-rw-r--r--src/northbridge/intel/i945/chip.h1
-rw-r--r--src/northbridge/intel/i945/debug.c1
-rw-r--r--src/northbridge/intel/i945/early_init.c1
-rw-r--r--src/northbridge/intel/i945/errata.c1
-rw-r--r--src/northbridge/intel/i945/gma.c1
-rw-r--r--src/northbridge/intel/i945/i945.h1
-rw-r--r--src/northbridge/intel/i945/memmap.c1
-rw-r--r--src/northbridge/intel/i945/northbridge.c1
-rw-r--r--src/northbridge/intel/i945/raminit.c1
-rw-r--r--src/northbridge/intel/i945/raminit.h1
-rw-r--r--src/northbridge/intel/i945/rcven.c1
-rw-r--r--src/northbridge/intel/i945/romstage.c1
-rw-r--r--src/northbridge/intel/ironlake/Kconfig1
-rw-r--r--src/northbridge/intel/ironlake/Makefile.inc1
-rw-r--r--src/northbridge/intel/ironlake/acpi.c1
-rw-r--r--src/northbridge/intel/ironlake/acpi/hostbridge.asl1
-rw-r--r--src/northbridge/intel/ironlake/acpi/ironlake.asl1
-rw-r--r--src/northbridge/intel/ironlake/bootblock.c1
-rw-r--r--src/northbridge/intel/ironlake/chip.h1
-rw-r--r--src/northbridge/intel/ironlake/early_init.c1
-rw-r--r--src/northbridge/intel/ironlake/finalize.c1
-rw-r--r--src/northbridge/intel/ironlake/gma.c1
-rw-r--r--src/northbridge/intel/ironlake/ironlake.h1
-rw-r--r--src/northbridge/intel/ironlake/memmap.c1
-rw-r--r--src/northbridge/intel/ironlake/northbridge.c1
-rw-r--r--src/northbridge/intel/ironlake/raminit.c1
-rw-r--r--src/northbridge/intel/ironlake/raminit.h1
-rw-r--r--src/northbridge/intel/ironlake/raminit_tables.c1
-rw-r--r--src/northbridge/intel/ironlake/raminit_tables.h1
-rw-r--r--src/northbridge/intel/ironlake/romstage.c1
-rw-r--r--src/northbridge/intel/ironlake/smi.c1
-rw-r--r--src/northbridge/intel/pineview/Kconfig1
-rw-r--r--src/northbridge/intel/pineview/Makefile.inc1
-rw-r--r--src/northbridge/intel/pineview/acpi.c1
-rw-r--r--src/northbridge/intel/pineview/acpi/hostbridge.asl1
-rw-r--r--src/northbridge/intel/pineview/acpi/peg.asl1
-rw-r--r--src/northbridge/intel/pineview/acpi/pineview.asl1
-rw-r--r--src/northbridge/intel/pineview/bootblock.c1
-rw-r--r--src/northbridge/intel/pineview/chip.h1
-rw-r--r--src/northbridge/intel/pineview/early_init.c1
-rw-r--r--src/northbridge/intel/pineview/gma.c1
-rw-r--r--src/northbridge/intel/pineview/iomap.h1
-rw-r--r--src/northbridge/intel/pineview/mchbar_regs.h1
-rw-r--r--src/northbridge/intel/pineview/memmap.c1
-rw-r--r--src/northbridge/intel/pineview/northbridge.c1
-rw-r--r--src/northbridge/intel/pineview/pineview.h1
-rw-r--r--src/northbridge/intel/pineview/raminit.c1
-rw-r--r--src/northbridge/intel/pineview/raminit.h1
-rw-r--r--src/northbridge/intel/pineview/romstage.c1
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig1
-rw-r--r--src/northbridge/intel/sandybridge/Makefile.inc1
-rw-r--r--src/northbridge/intel/sandybridge/acpi.c1
-rw-r--r--src/northbridge/intel/sandybridge/acpi/hostbridge.asl1
-rw-r--r--src/northbridge/intel/sandybridge/acpi/peg.asl1
-rw-r--r--src/northbridge/intel/sandybridge/acpi/sandybridge.asl1
-rw-r--r--src/northbridge/intel/sandybridge/bootblock.c1
-rw-r--r--src/northbridge/intel/sandybridge/chip.h1
-rw-r--r--src/northbridge/intel/sandybridge/common.c1
-rw-r--r--src/northbridge/intel/sandybridge/early_dmi.c1
-rw-r--r--src/northbridge/intel/sandybridge/early_init.c1
-rw-r--r--src/northbridge/intel/sandybridge/finalize.c1
-rw-r--r--src/northbridge/intel/sandybridge/gma.c1
-rw-r--r--src/northbridge/intel/sandybridge/gma.h1
-rw-r--r--src/northbridge/intel/sandybridge/mchbar_regs.h1
-rw-r--r--src/northbridge/intel/sandybridge/memmap.c1
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c1
-rw-r--r--src/northbridge/intel/sandybridge/pcie.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit.h1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.h1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_native.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_native.h1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_shared.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_tables.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_tables.h1
-rw-r--r--src/northbridge/intel/sandybridge/romstage.c1
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h1
-rw-r--r--src/northbridge/intel/x4x/Kconfig1
-rw-r--r--src/northbridge/intel/x4x/Makefile.inc1
-rw-r--r--src/northbridge/intel/x4x/acpi.c1
-rw-r--r--src/northbridge/intel/x4x/acpi/hostbridge.asl1
-rw-r--r--src/northbridge/intel/x4x/acpi/peg.asl1
-rw-r--r--src/northbridge/intel/x4x/acpi/x4x.asl1
-rw-r--r--src/northbridge/intel/x4x/bootblock.c1
-rw-r--r--src/northbridge/intel/x4x/chip.h1
-rw-r--r--src/northbridge/intel/x4x/dq_dqs.c1
-rw-r--r--src/northbridge/intel/x4x/early_init.c1
-rw-r--r--src/northbridge/intel/x4x/gma.c1
-rw-r--r--src/northbridge/intel/x4x/iomap.h1
-rw-r--r--src/northbridge/intel/x4x/memmap.c1
-rw-r--r--src/northbridge/intel/x4x/northbridge.c1
-rw-r--r--src/northbridge/intel/x4x/raminit.c1
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr23.c1
-rw-r--r--src/northbridge/intel/x4x/raminit_tables.c1
-rw-r--r--src/northbridge/intel/x4x/rcven.c1
-rw-r--r--src/northbridge/intel/x4x/romstage.c1
-rw-r--r--src/northbridge/intel/x4x/x4x.h1
168 files changed, 0 insertions, 168 deletions
diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
index 0e49a21b4d7a..32fe1cffbf5d 100644
--- a/src/northbridge/intel/e7505/Kconfig
+++ b/src/northbridge/intel/e7505/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_E7505
diff --git a/src/northbridge/intel/e7505/e7505.h b/src/northbridge/intel/e7505/e7505.h
index fe80bfd87ca4..b429c70ba43d 100644
--- a/src/northbridge/intel/e7505/e7505.h
+++ b/src/northbridge/intel/e7505/e7505.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c
index 7d0ac3713b0f..92b2ae7740b4 100644
--- a/src/northbridge/intel/e7505/memmap.c
+++ b/src/northbridge/intel/e7505/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index e8944669a326..e6be17b53ecf 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <acpi/acpi.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index fd88193b91bc..65db922b5ea9 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* This was originally for the e7500, modified for e7501
* The primary differences are that 7501 apparently can
diff --git a/src/northbridge/intel/e7505/raminit.h b/src/northbridge/intel/e7505/raminit.h
index a623e3519af8..1e0128ce7224 100644
--- a/src/northbridge/intel/e7505/raminit.h
+++ b/src/northbridge/intel/e7505/raminit.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_H
#define RAMINIT_H
diff --git a/src/northbridge/intel/e7505/romstage.c b/src/northbridge/intel/e7505/romstage.c
index e2cbf661ac97..df10f9dbcf60 100644
--- a/src/northbridge/intel/e7505/romstage.c
+++ b/src/northbridge/intel/e7505/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <cbmem.h>
#include <arch/romstage.h>
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 7edea51dfd90..f5d67123862a 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_GM45
diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc
index 9228a1f4e2d0..17e510822a34 100644
--- a/src/northbridge/intel/gm45/Makefile.inc
+++ b/src/northbridge/intel/gm45/Makefile.inc
@@ -1,5 +1,4 @@
#
-# This file is part of the coreboot project.
#
#
# SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index c81d21f0d0fd..7a5d0b1ce5dc 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/acpi/gm45.asl b/src/northbridge/intel/gm45/acpi/gm45.asl
index 270ad90c3284..7d64200ddbf9 100644
--- a/src/northbridge/intel/gm45/acpi/gm45.asl
+++ b/src/northbridge/intel/gm45/acpi/gm45.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "hostbridge.asl"
#include "../gm45.h"
diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl
index d09d44dfb04f..bafedff2c836 100644
--- a/src/northbridge/intel/gm45/acpi/hostbridge.asl
+++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/ioapic.h>
diff --git a/src/northbridge/intel/gm45/acpi/peg.asl b/src/northbridge/intel/gm45/acpi/peg.asl
index 7dc67183b2bf..f85a22c08be0 100644
--- a/src/northbridge/intel/gm45/acpi/peg.asl
+++ b/src/northbridge/intel/gm45/acpi/peg.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (PEGP)
{
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index b10a75d454b6..e74354ebdba7 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/gm45/chip.h b/src/northbridge/intel/gm45/chip.h
index a8a549d72ef7..0d09bb40efc9 100644
--- a/src/northbridge/intel/gm45/chip.h
+++ b/src/northbridge/intel/gm45/chip.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_GM45_CHIP_H
#define NORTHBRIDGE_INTEL_GM45_CHIP_H
diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c
index 712932aad5da..1be351890be6 100644
--- a/src/northbridge/intel/gm45/early_init.c
+++ b/src/northbridge/intel/gm45/early_init.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/gm45/early_reset.c b/src/northbridge/intel/gm45/early_reset.c
index eff89bfd3d9c..44917465d61d 100644
--- a/src/northbridge/intel/gm45/early_reset.c
+++ b/src/northbridge/intel/gm45/early_reset.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <cf9_reset.h>
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 423a8f25eb5a..d9cfbf709068 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __NORTHBRIDGE_INTEL_GM45_GM45_H__
#define __NORTHBRIDGE_INTEL_GM45_GM45_H__
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index 8a38bdf4ead7..0c97b64b39b6 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/mmio.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index 173af1bc5c0e..10a6f84875d0 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <stddef.h>
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 4d88e3609d2c..422655409a25 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <string.h>
diff --git a/src/northbridge/intel/gm45/memmap.c b/src/northbridge/intel/gm45/memmap.c
index 0d03731d47c4..4fe3998beebf 100644
--- a/src/northbridge/intel/gm45/memmap.c
+++ b/src/northbridge/intel/gm45/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index d566120827ff..cd64dfe3ddb2 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c
index 0337c55e5817..2cab42f4bbe5 100644
--- a/src/northbridge/intel/gm45/pcie.c
+++ b/src/northbridge/intel/gm45/pcie.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <stddef.h>
diff --git a/src/northbridge/intel/gm45/pm.c b/src/northbridge/intel/gm45/pm.c
index 5e03a3ca1214..6033c0aca2c4 100644
--- a/src/northbridge/intel/gm45/pm.c
+++ b/src/northbridge/intel/gm45/pm.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <stddef.h>
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index e6582ad53c81..fbf9f01cfa02 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <commonlib/helpers.h>
#include <stdint.h>
diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
index ee6544b9d245..94da2dc5892e 100644
--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <delay.h>
diff --git a/src/northbridge/intel/gm45/raminit_read_write_training.c b/src/northbridge/intel/gm45/raminit_read_write_training.c
index 38a48d96d324..e8d719fca688 100644
--- a/src/northbridge/intel/gm45/raminit_read_write_training.c
+++ b/src/northbridge/intel/gm45/raminit_read_write_training.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c b/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c
index c6c092ba2a94..6d95b3401b1a 100644
--- a/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c
+++ b/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/gm45/romstage.c b/src/northbridge/intel/gm45/romstage.c
index 9bfb4e99bb6b..f7998c926a65 100644
--- a/src/northbridge/intel/gm45/romstage.c
+++ b/src/northbridge/intel/gm45/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <cbmem.h>
#include <romstage_handoff.h>
diff --git a/src/northbridge/intel/gm45/thermal.c b/src/northbridge/intel/gm45/thermal.c
index 73164946ad03..ed1ec959bddb 100644
--- a/src/northbridge/intel/gm45/thermal.c
+++ b/src/northbridge/intel/gm45/thermal.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <stddef.h>
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 972b3c996a05..6501bc41a89f 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_HASWELL
diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
index e15a09f6a5ee..6eb6978310b0 100644
--- a/src/northbridge/intel/haswell/Makefile.inc
+++ b/src/northbridge/intel/haswell/Makefile.inc
@@ -1,5 +1,4 @@
#
-# This file is part of the coreboot project.
#
#
# SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index a66847d6a9bb..1df66bc4d1f5 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/haswell/acpi/haswell.asl b/src/northbridge/intel/haswell/acpi/haswell.asl
index 27329a435bf6..4a9debfd3e27 100644
--- a/src/northbridge/intel/haswell/acpi/haswell.asl
+++ b/src/northbridge/intel/haswell/acpi/haswell.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "../haswell.h"
#include "hostbridge.asl"
diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl
index 8c155b7a86d4..d8e35d337e94 100644
--- a/src/northbridge/intel/haswell/acpi/hostbridge.asl
+++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Name(_HID,EISAID("PNP0A08")) // PCIe
diff --git a/src/northbridge/intel/haswell/acpi/peg.asl b/src/northbridge/intel/haswell/acpi/peg.asl
index 894978dff315..8dac128b8a49 100644
--- a/src/northbridge/intel/haswell/acpi/peg.asl
+++ b/src/northbridge/intel/haswell/acpi/peg.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (PEGP)
{
diff --git a/src/northbridge/intel/haswell/bootblock.c b/src/northbridge/intel/haswell/bootblock.c
index b6cfd0b65d8b..41f18be337f7 100644
--- a/src/northbridge/intel/haswell/bootblock.c
+++ b/src/northbridge/intel/haswell/bootblock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h
index 678afb6831ac..593144d1d072 100644
--- a/src/northbridge/intel/haswell/chip.h
+++ b/src/northbridge/intel/haswell/chip.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_HASWELL_CHIP_H
#define NORTHBRIDGE_INTEL_HASWELL_CHIP_H
diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
index 150cf27646f0..fb148fab1a57 100644
--- a/src/northbridge/intel/haswell/early_init.c
+++ b/src/northbridge/intel/haswell/early_init.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index 2c69f0b2f5ff..93c89ce1eb5e 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/pci_ops.h>
#include "haswell.h"
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 4d70d1a0011f..0caa64fe11ee 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <commonlib/helpers.h>
#include <arch/io.h>
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 32ac7c3db40d..bd441685b7d5 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __NORTHBRIDGE_INTEL_HASWELL_HASWELL_H__
#define __NORTHBRIDGE_INTEL_HASWELL_HASWELL_H__
diff --git a/src/northbridge/intel/haswell/mchbar_regs.h b/src/northbridge/intel/haswell/mchbar_regs.h
index fdd65daeb6cd..5fe15567e5fa 100644
--- a/src/northbridge/intel/haswell/mchbar_regs.h
+++ b/src/northbridge/intel/haswell/mchbar_regs.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __HASWELL_MCHBAR_REGS_H__
#define __HASWELL_MCHBAR_REGS_H__
diff --git a/src/northbridge/intel/haswell/memmap.c b/src/northbridge/intel/haswell/memmap.c
index fd7576c969c9..a86efeb78804 100644
--- a/src/northbridge/intel/haswell/memmap.c
+++ b/src/northbridge/intel/haswell/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Use simple device model for this file even in ramstage */
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c
index fffac52d9ca3..f8a16e231ff6 100644
--- a/src/northbridge/intel/haswell/minihd.c
+++ b/src/northbridge/intel/haswell/minihd.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 099e7f0dc06a..458439ef3222 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <commonlib/helpers.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/haswell/pcie.c b/src/northbridge/intel/haswell/pcie.c
index 70f2c1940123..74f11dde8c99 100644
--- a/src/northbridge/intel/haswell/pcie.c
+++ b/src/northbridge/intel/haswell/pcie.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index ddb2f8331419..8cd9e77aeed8 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <console/usb.h>
diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h
index 945ee154d2f5..562c24d5b6bf 100644
--- a/src/northbridge/intel/haswell/raminit.h
+++ b/src/northbridge/intel/haswell/raminit.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_H
#define RAMINIT_H
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c
index 2dc05950fdf5..8ea4175c3623 100644
--- a/src/northbridge/intel/haswell/report_platform.c
+++ b/src/northbridge/intel/haswell/report_platform.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <arch/cpu.h>
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
index d8a81934fc66..8a6783eba968 100644
--- a/src/northbridge/intel/i440bx/Kconfig
+++ b/src/northbridge/intel/i440bx/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_I440BX
diff --git a/src/northbridge/intel/i440bx/Makefile.inc b/src/northbridge/intel/i440bx/Makefile.inc
index 62708114695a..e57181d39477 100644
--- a/src/northbridge/intel/i440bx/Makefile.inc
+++ b/src/northbridge/intel/i440bx/Makefile.inc
@@ -1,5 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-or-later
-## This file is part of the coreboot project.
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I440BX),y)
diff --git a/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl b/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl
index 856b3e83f22b..fe66f3931142 100644
--- a/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl
+++ b/src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* i440bx Northbridge */
Device (NB)
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index 57df23fe44b4..b2b96176ca06 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i440bx/i440bx.h b/src/northbridge/intel/i440bx/i440bx.h
index 1b5800347868..bbbd3f27b61b 100644
--- a/src/northbridge/intel/i440bx/i440bx.h
+++ b/src/northbridge/intel/i440bx/i440bx.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_I440BX_I440BX_H
#define NORTHBRIDGE_INTEL_I440BX_I440BX_H
diff --git a/src/northbridge/intel/i440bx/memmap.c b/src/northbridge/intel/i440bx/memmap.c
index 7231ccbf5dc9..b6d95268ad17 100644
--- a/src/northbridge/intel/i440bx/memmap.c
+++ b/src/northbridge/intel/i440bx/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/romstage.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index d0c93fd35d2c..aefd026bfc3e 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index d1e0f40ac1a1..19108136ab21 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
#include <spd.h>
#include <delay.h>
diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h
index e9099de2e908..87c799ee5f70 100644
--- a/src/northbridge/intel/i440bx/raminit.h
+++ b/src/northbridge/intel/i440bx/raminit.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_H
#define RAMINIT_H
diff --git a/src/northbridge/intel/i440bx/romstage.c b/src/northbridge/intel/i440bx/romstage.c
index 199cf5cf0c27..e734a291b23b 100644
--- a/src/northbridge/intel/i440bx/romstage.c
+++ b/src/northbridge/intel/i440bx/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-/* This file is part of the coreboot project. */
#include <arch/romstage.h>
#include <cbmem.h>
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 2c83be420f6b..754f36c9966b 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_I945
diff --git a/src/northbridge/intel/i945/Makefile.inc b/src/northbridge/intel/i945/Makefile.inc
index 128596f86bce..d1214308e0d9 100644
--- a/src/northbridge/intel/i945/Makefile.inc
+++ b/src/northbridge/intel/i945/Makefile.inc
@@ -1,5 +1,4 @@
#
-# This file is part of the coreboot project.
#
#
# SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c
index 1c7eabcb5732..75a6da517557 100644
--- a/src/northbridge/intel/i945/acpi.c
+++ b/src/northbridge/intel/i945/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <acpi/acpi.h>
diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl
index 33d9419291f0..5c202b9573df 100644
--- a/src/northbridge/intel/i945/acpi/hostbridge.asl
+++ b/src/northbridge/intel/i945/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/ioapic.h>
diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl
index a972939929ab..789225ca7195 100644
--- a/src/northbridge/intel/i945/acpi/i945.asl
+++ b/src/northbridge/intel/i945/acpi/i945.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "hostbridge.asl"
#include "../i945.h"
diff --git a/src/northbridge/intel/i945/acpi/igd.asl b/src/northbridge/intel/i945/acpi/igd.asl
index 94f45ef3da0d..5258c526723b 100644
--- a/src/northbridge/intel/i945/acpi/igd.asl
+++ b/src/northbridge/intel/i945/acpi/igd.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (GFX0)
{
diff --git a/src/northbridge/intel/i945/acpi/peg.asl b/src/northbridge/intel/i945/acpi/peg.asl
index 7dc67183b2bf..f85a22c08be0 100644
--- a/src/northbridge/intel/i945/acpi/peg.asl
+++ b/src/northbridge/intel/i945/acpi/peg.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (PEGP)
{
diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c
index edc217049351..9a1444365a31 100644
--- a/src/northbridge/intel/i945/bootblock.c
+++ b/src/northbridge/intel/i945/bootblock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h
index a43702890884..0de0e58f9f69 100644
--- a/src/northbridge/intel/i945/chip.h
+++ b/src/northbridge/intel/i945/chip.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_I945_CHIP_H
#define NORTHBRIDGE_INTEL_I945_CHIP_H
diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c
index 181ef5171ae1..65da1aed68c6 100644
--- a/src/northbridge/intel/i945/debug.c
+++ b/src/northbridge/intel/i945/debug.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <spd.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index ced635a3378d..749eb3e9cd0e 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/io.h>
#include <cbmem.h>
diff --git a/src/northbridge/intel/i945/errata.c b/src/northbridge/intel/i945/errata.c
index ecdb5ea0c706..e8793c97db90 100644
--- a/src/northbridge/intel/i945/errata.c
+++ b/src/northbridge/intel/i945/errata.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include "i945.h"
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 3259ac4dad56..dfdd2fa34eef 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <bootmode.h>
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index 56d4370e02e1..20558b31cb8d 100644
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_I945_H
#define NORTHBRIDGE_INTEL_I945_H
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c
index 0183ea2b3f50..07aea98d170f 100644
--- a/src/northbridge/intel/i945/memmap.c
+++ b/src/northbridge/intel/i945/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
// Use simple device model for this file even in ramstage
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index c080d0cbd506..f814c976b4d9 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index f26fac620765..4e3509eb985b 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <delay.h>
diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h
index 08943e795e88..513984fc6633 100644
--- a/src/northbridge/intel/i945/raminit.h
+++ b/src/northbridge/intel/i945/raminit.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_H
#define RAMINIT_H
diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c
index 84814f735554..58fcfbcf6016 100644
--- a/src/northbridge/intel/i945/rcven.c
+++ b/src/northbridge/intel/i945/rcven.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/i945/romstage.c b/src/northbridge/intel/i945/romstage.c
index 4649c10a451a..2c9bdbb27563 100644
--- a/src/northbridge/intel/i945/romstage.c
+++ b/src/northbridge/intel/i945/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <cf9_reset.h>
diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
index 30370f89b0e6..fbad4be6715c 100644
--- a/src/northbridge/intel/ironlake/Kconfig
+++ b/src/northbridge/intel/ironlake/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_IRONLAKE
diff --git a/src/northbridge/intel/ironlake/Makefile.inc b/src/northbridge/intel/ironlake/Makefile.inc
index 77081feb082f..43dd124ae5e8 100644
--- a/src/northbridge/intel/ironlake/Makefile.inc
+++ b/src/northbridge/intel/ironlake/Makefile.inc
@@ -1,5 +1,4 @@
#
-# This file is part of the coreboot project.
#
#
# SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/ironlake/acpi.c b/src/northbridge/intel/ironlake/acpi.c
index 9bb3130c77d2..7289e9219a67 100644
--- a/src/northbridge/intel/ironlake/acpi.c
+++ b/src/northbridge/intel/ironlake/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/ironlake/acpi/hostbridge.asl b/src/northbridge/intel/ironlake/acpi/hostbridge.asl
index dfef304885e7..6a59fb546dce 100644
--- a/src/northbridge/intel/ironlake/acpi/hostbridge.asl
+++ b/src/northbridge/intel/ironlake/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Name(_HID,EISAID("PNP0A08")) // PCIe
diff --git a/src/northbridge/intel/ironlake/acpi/ironlake.asl b/src/northbridge/intel/ironlake/acpi/ironlake.asl
index 227e9a731e7f..3cf597daf701 100644
--- a/src/northbridge/intel/ironlake/acpi/ironlake.asl
+++ b/src/northbridge/intel/ironlake/acpi/ironlake.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "../ironlake.h"
#include "hostbridge.asl"
diff --git a/src/northbridge/intel/ironlake/bootblock.c b/src/northbridge/intel/ironlake/bootblock.c
index f66c9ca8e029..d40b0b5d54e2 100644
--- a/src/northbridge/intel/ironlake/bootblock.c
+++ b/src/northbridge/intel/ironlake/bootblock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/ironlake/chip.h b/src/northbridge/intel/ironlake/chip.h
index 087c28aea4f0..c437b724a434 100644
--- a/src/northbridge/intel/ironlake/chip.h
+++ b/src/northbridge/intel/ironlake/chip.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_IRONLAKE_CHIP_H
#define NORTHBRIDGE_INTEL_IRONLAKE_CHIP_H
diff --git a/src/northbridge/intel/ironlake/early_init.c b/src/northbridge/intel/ironlake/early_init.c
index 7c522e005c8f..b6c5f0fe3459 100644
--- a/src/northbridge/intel/ironlake/early_init.c
+++ b/src/northbridge/intel/ironlake/early_init.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/ironlake/finalize.c b/src/northbridge/intel/ironlake/finalize.c
index fe9753dbb6a2..6e0844b6dcec 100644
--- a/src/northbridge/intel/ironlake/finalize.c
+++ b/src/northbridge/intel/ironlake/finalize.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "ironlake.h"
diff --git a/src/northbridge/intel/ironlake/gma.c b/src/northbridge/intel/ironlake/gma.c
index 252110592007..1836d84253f8 100644
--- a/src/northbridge/intel/ironlake/gma.c
+++ b/src/northbridge/intel/ironlake/gma.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/io.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/ironlake/ironlake.h b/src/northbridge/intel/ironlake/ironlake.h
index 4b4d736a0f79..93d55a9dbf5c 100644
--- a/src/northbridge/intel/ironlake/ironlake.h
+++ b/src/northbridge/intel/ironlake/ironlake.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __NORTHBRIDGE_INTEL_IRONLAKE_IRONLAKE_H__
#define __NORTHBRIDGE_INTEL_IRONLAKE_IRONLAKE_H__
diff --git a/src/northbridge/intel/ironlake/memmap.c b/src/northbridge/intel/ironlake/memmap.c
index 136d57212b64..406b9a90fee0 100644
--- a/src/northbridge/intel/ironlake/memmap.c
+++ b/src/northbridge/intel/ironlake/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c
index 7384223c0d55..07b8f53e6127 100644
--- a/src/northbridge/intel/ironlake/northbridge.c
+++ b/src/northbridge/intel/ironlake/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <acpi/acpi.h>
diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c
index 33b225659e8d..e85163fe72ce 100644
--- a/src/northbridge/intel/ironlake/raminit.c
+++ b/src/northbridge/intel/ironlake/raminit.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <console/console.h>
diff --git a/src/northbridge/intel/ironlake/raminit.h b/src/northbridge/intel/ironlake/raminit.h
index 44e2299d665f..5bb2f590a631 100644
--- a/src/northbridge/intel/ironlake/raminit.h
+++ b/src/northbridge/intel/ironlake/raminit.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_H
#define RAMINIT_H
diff --git a/src/northbridge/intel/ironlake/raminit_tables.c b/src/northbridge/intel/ironlake/raminit_tables.c
index 721e00b91673..8dacc59ba08a 100644
--- a/src/northbridge/intel/ironlake/raminit_tables.c
+++ b/src/northbridge/intel/ironlake/raminit_tables.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include "raminit_tables.h"
diff --git a/src/northbridge/intel/ironlake/raminit_tables.h b/src/northbridge/intel/ironlake/raminit_tables.h
index 822cb198f2fd..1aad8e3d80d8 100644
--- a/src/northbridge/intel/ironlake/raminit_tables.h
+++ b/src/northbridge/intel/ironlake/raminit_tables.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef RAMINIT_TABLES_H
diff --git a/src/northbridge/intel/ironlake/romstage.c b/src/northbridge/intel/ironlake/romstage.c
index 749849e4f4c1..4a335d853cdd 100644
--- a/src/northbridge/intel/ironlake/romstage.c
+++ b/src/northbridge/intel/ironlake/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/ironlake/smi.c b/src/northbridge/intel/ironlake/smi.c
index e6219b512eb0..9ffcb995a317 100644
--- a/src/northbridge/intel/ironlake/smi.c
+++ b/src/northbridge/intel/ironlake/smi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
index 181846fdc19a..a1b089459b1e 100644
--- a/src/northbridge/intel/pineview/Kconfig
+++ b/src/northbridge/intel/pineview/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_PINEVIEW
diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc
index 645f0182b171..bd7d58958a41 100644
--- a/src/northbridge/intel/pineview/Makefile.inc
+++ b/src/northbridge/intel/pineview/Makefile.inc
@@ -1,5 +1,4 @@
#
-# This file is part of the coreboot project.
#
#
# SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c
index cf91f1ea65a0..575814c2d521 100644
--- a/src/northbridge/intel/pineview/acpi.c
+++ b/src/northbridge/intel/pineview/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <acpi/acpigen.h>
#include <acpi/acpi.h>
diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl
index 05ed293dd302..434ed0717644 100644
--- a/src/northbridge/intel/pineview/acpi/hostbridge.asl
+++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/ioapic.h>
diff --git a/src/northbridge/intel/pineview/acpi/peg.asl b/src/northbridge/intel/pineview/acpi/peg.asl
index 7dc67183b2bf..f85a22c08be0 100644
--- a/src/northbridge/intel/pineview/acpi/peg.asl
+++ b/src/northbridge/intel/pineview/acpi/peg.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (PEGP)
{
diff --git a/src/northbridge/intel/pineview/acpi/pineview.asl b/src/northbridge/intel/pineview/acpi/pineview.asl
index ebb6eb9bddc7..074e9007d756 100644
--- a/src/northbridge/intel/pineview/acpi/pineview.asl
+++ b/src/northbridge/intel/pineview/acpi/pineview.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "hostbridge.asl"
#include "../iomap.h"
diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c
index d8d19380d817..7fb506e7512e 100644
--- a/src/northbridge/intel/pineview/bootblock.c
+++ b/src/northbridge/intel/pineview/bootblock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/pineview/chip.h b/src/northbridge/intel/pineview/chip.h
index db3aa19707d9..6d67969e7888 100644
--- a/src/northbridge/intel/pineview/chip.h
+++ b/src/northbridge/intel/pineview/chip.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_PINEVIEW_CHIP_H
#define NORTHBRIDGE_INTEL_PINEVIEW_CHIP_H
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c
index 9c0b46e2b6eb..5b9ef4d3fdac 100644
--- a/src/northbridge/intel/pineview/early_init.c
+++ b/src/northbridge/intel/pineview/early_init.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <console/console.h>
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c
index 7d6b51d93a96..b0ecfe1d64bc 100644
--- a/src/northbridge/intel/pineview/gma.c
+++ b/src/northbridge/intel/pineview/gma.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/io.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/pineview/iomap.h b/src/northbridge/intel/pineview/iomap.h
index e7472b43a9c4..4560da0eda73 100644
--- a/src/northbridge/intel/pineview/iomap.h
+++ b/src/northbridge/intel/pineview/iomap.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef PINEVIEW_IOMAP_H
diff --git a/src/northbridge/intel/pineview/mchbar_regs.h b/src/northbridge/intel/pineview/mchbar_regs.h
index f331f1d2f2c2..e9cd7ce46ab6 100644
--- a/src/northbridge/intel/pineview/mchbar_regs.h
+++ b/src/northbridge/intel/pineview/mchbar_regs.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __PINEVIEW_MCHBAR_REGS_H__
#define __PINEVIEW_MCHBAR_REGS_H__
diff --git a/src/northbridge/intel/pineview/memmap.c b/src/northbridge/intel/pineview/memmap.c
index 4717b76a551f..ad89aef04dba 100644
--- a/src/northbridge/intel/pineview/memmap.c
+++ b/src/northbridge/intel/pineview/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index af4bfb8ef59a..83bc60eecec2 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/pineview/pineview.h b/src/northbridge/intel/pineview/pineview.h
index df4232a759e1..55d098b9d44d 100644
--- a/src/northbridge/intel/pineview/pineview.h
+++ b/src/northbridge/intel/pineview/pineview.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef NORTHBRIDGE_INTEL_PINEVIEW_H
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index 1e1170d4f3c4..25c9ba254499 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <cf9_reset.h>
diff --git a/src/northbridge/intel/pineview/raminit.h b/src/northbridge/intel/pineview/raminit.h
index 3d5211791383..22e65cd648a7 100644
--- a/src/northbridge/intel/pineview/raminit.h
+++ b/src/northbridge/intel/pineview/raminit.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef PINEVIEW_RAMINIT_H
diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index eddfc668e946..22ed95252fe2 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <timestamp.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 6b7520f27d08..ef6dc3daf5bf 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -1,5 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-only
-## This file is part of the coreboot project.
config NORTHBRIDGE_INTEL_SANDYBRIDGE
bool
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index de522426127c..a5b2e5efb6c4 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -1,5 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-only
-## This file is part of the coreboot project.
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y)
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 3ae44b8b3654..2cfb9ee8c33b 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
index 26df8f2de1d0..c3561f85b641 100644
--- a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Name(_HID,EISAID("PNP0A08")) // PCIe
Name(_CID,EISAID("PNP0A03")) // PCI
diff --git a/src/northbridge/intel/sandybridge/acpi/peg.asl b/src/northbridge/intel/sandybridge/acpi/peg.asl
index e48cbea3b87f..65b71d1cc342 100644
--- a/src/northbridge/intel/sandybridge/acpi/peg.asl
+++ b/src/northbridge/intel/sandybridge/acpi/peg.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (PEGP)
{
diff --git a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
index 2dd5c00f3110..728d8e3ff525 100644
--- a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "hostbridge.asl"
#include "peg.asl"
diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c
index 39564cf970b1..37ef02531e9b 100644
--- a/src/northbridge/intel/sandybridge/bootblock.c
+++ b/src/northbridge/intel/sandybridge/bootblock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h
index 2e97f314066a..8f388ec18849 100644
--- a/src/northbridge/intel/sandybridge/chip.h
+++ b/src/northbridge/intel/sandybridge/chip.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_SANDYBRIDGE_CHIP_H
#define NORTHBRIDGE_INTEL_SANDYBRIDGE_CHIP_H
diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c
index 0533d1ddfa0a..d64a740b04e8 100644
--- a/src/northbridge/intel/sandybridge/common.c
+++ b/src/northbridge/intel/sandybridge/common.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/early_dmi.c b/src/northbridge/intel/sandybridge/early_dmi.c
index 89bed7403d6e..287c4414d2ff 100644
--- a/src/northbridge/intel/sandybridge/early_dmi.c
+++ b/src/northbridge/intel/sandybridge/early_dmi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index d63ba1e311dd..59f05047a3a6 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c
index e3e1964349c6..26c53060c935 100644
--- a/src/northbridge/intel/sandybridge/finalize.c
+++ b/src/northbridge/intel/sandybridge/finalize.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <device/pci_ops.h>
#include "sandybridge.h"
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index bb099f06638d..9ff68d1e7df5 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/io.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/sandybridge/gma.h b/src/northbridge/intel/sandybridge/gma.h
index 3eaa4845a170..c15ad5370fd3 100644
--- a/src/northbridge/intel/sandybridge/gma.h
+++ b/src/northbridge/intel/sandybridge/gma.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef NORTHBRIDGE_INTEL_SANDYBRIDGE_GMA_H
#define NORTHBRIDGE_INTEL_SANDYBRIDGE_GMA_H
diff --git a/src/northbridge/intel/sandybridge/mchbar_regs.h b/src/northbridge/intel/sandybridge/mchbar_regs.h
index 5f46e706a895..74377b247b6c 100644
--- a/src/northbridge/intel/sandybridge/mchbar_regs.h
+++ b/src/northbridge/intel/sandybridge/mchbar_regs.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __SANDYBRIDGE_MCHBAR_REGS_H__
#define __SANDYBRIDGE_MCHBAR_REGS_H__
diff --git a/src/northbridge/intel/sandybridge/memmap.c b/src/northbridge/intel/sandybridge/memmap.c
index 52a83e74c0e8..8da4ec9eeba7 100644
--- a/src/northbridge/intel/sandybridge/memmap.c
+++ b/src/northbridge/intel/sandybridge/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index e947bc56134c..b3772189b23f 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <acpi/acpi.h>
diff --git a/src/northbridge/intel/sandybridge/pcie.c b/src/northbridge/intel/sandybridge/pcie.c
index 0c3912c0bf96..f2b75d6ca615 100644
--- a/src/northbridge/intel/sandybridge/pcie.c
+++ b/src/northbridge/intel/sandybridge/pcie.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 6c8145d13dbf..a2b26ae1bf67 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <commonlib/region.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.h b/src/northbridge/intel/sandybridge/raminit.h
index efd87d0099fe..dc0134312f09 100644
--- a/src/northbridge/intel/sandybridge/raminit.h
+++ b/src/northbridge/intel/sandybridge/raminit.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_H
#define RAMINIT_H
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 087ba2b550a1..19b72cb18ec0 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <commonlib/helpers.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h
index 314c67de80c2..4c97bfe6d482 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.h
+++ b/src/northbridge/intel/sandybridge/raminit_common.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_COMMON_H
#define RAMINIT_COMMON_H
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 2178c9d2ff2f..43858f53bb43 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <console/usb.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c
index 832391f72e13..e95f154c02a4 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.c
+++ b/src/northbridge/intel/sandybridge/raminit_native.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <commonlib/clamp.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_native.h b/src/northbridge/intel/sandybridge/raminit_native.h
index 21ba99b49dd4..1bba1809c621 100644
--- a/src/northbridge/intel/sandybridge/raminit_native.h
+++ b/src/northbridge/intel/sandybridge/raminit_native.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_NATIVE_H
#define RAMINIT_NATIVE_H
diff --git a/src/northbridge/intel/sandybridge/raminit_shared.c b/src/northbridge/intel/sandybridge/raminit_shared.c
index ab91b05a1082..426035d810a0 100644
--- a/src/northbridge/intel/sandybridge/raminit_shared.c
+++ b/src/northbridge/intel/sandybridge/raminit_shared.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/mmio.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_tables.c b/src/northbridge/intel/sandybridge/raminit_tables.c
index 67dbd2ba14c6..bd0d11778a8a 100644
--- a/src/northbridge/intel/sandybridge/raminit_tables.c
+++ b/src/northbridge/intel/sandybridge/raminit_tables.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "raminit_tables.h"
diff --git a/src/northbridge/intel/sandybridge/raminit_tables.h b/src/northbridge/intel/sandybridge/raminit_tables.h
index e5cf589b70a1..99077a452875 100644
--- a/src/northbridge/intel/sandybridge/raminit_tables.h
+++ b/src/northbridge/intel/sandybridge/raminit_tables.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef RAMINIT_TABLES_H
#define RAMINIT_TABLES_H
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 874598641641..dce024b03368 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 0b29e1705ebf..1652b095cf7c 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
#define __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 82fce8f61e00..9ac9b879334b 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_X4X
diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc
index 508df6df0d96..e96510bc52f3 100644
--- a/src/northbridge/intel/x4x/Makefile.inc
+++ b/src/northbridge/intel/x4x/Makefile.inc
@@ -1,5 +1,4 @@
#
-# This file is part of the coreboot project.
#
#
# SPDX-License-Identifier: GPL-2.0-only
diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c
index 67fc93334b9b..57173fd156bf 100644
--- a/src/northbridge/intel/x4x/acpi.c
+++ b/src/northbridge/intel/x4x/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <types.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/x4x/acpi/hostbridge.asl b/src/northbridge/intel/x4x/acpi/hostbridge.asl
index 0126aaf0a765..9a5cbd9618bb 100644
--- a/src/northbridge/intel/x4x/acpi/hostbridge.asl
+++ b/src/northbridge/intel/x4x/acpi/hostbridge.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <arch/ioapic.h>
diff --git a/src/northbridge/intel/x4x/acpi/peg.asl b/src/northbridge/intel/x4x/acpi/peg.asl
index 07baf85ad631..46731289d8ff 100644
--- a/src/northbridge/intel/x4x/acpi/peg.asl
+++ b/src/northbridge/intel/x4x/acpi/peg.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Device (PEGP)
{
diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl
index e9761678ef64..51deea8f673c 100644
--- a/src/northbridge/intel/x4x/acpi/x4x.asl
+++ b/src/northbridge/intel/x4x/acpi/x4x.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include "hostbridge.asl"
#include "../iomap.h"
diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c
index 61d987b33892..5db93824ce61 100644
--- a/src/northbridge/intel/x4x/bootblock.c
+++ b/src/northbridge/intel/x4x/bootblock.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/bootblock.h>
diff --git a/src/northbridge/intel/x4x/chip.h b/src/northbridge/intel/x4x/chip.h
index 7d40d209a185..4cfb83e83113 100644
--- a/src/northbridge/intel/x4x/chip.h
+++ b/src/northbridge/intel/x4x/chip.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef NORTHBRIDGE_INTEL_X4X_CHIP_H
diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c
index 82f4acd4b6af..7df259172ac5 100644
--- a/src/northbridge/intel/x4x/dq_dqs.c
+++ b/src/northbridge/intel/x4x/dq_dqs.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/mmio.h>
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index 4cfc37ae6c94..87c684ced61e 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <stdint.h>
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c
index 03d72649aaeb..0067d71bbc3c 100644
--- a/src/northbridge/intel/x4x/gma.c
+++ b/src/northbridge/intel/x4x/gma.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <console/console.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/x4x/iomap.h b/src/northbridge/intel/x4x/iomap.h
index 06eb7462c32e..d016cf74af71 100644
--- a/src/northbridge/intel/x4x/iomap.h
+++ b/src/northbridge/intel/x4x/iomap.h
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef X4X_IOMAP_H
diff --git a/src/northbridge/intel/x4x/memmap.c b/src/northbridge/intel/x4x/memmap.c
index 233f5ecbd716..ee1ec5e2be82 100644
--- a/src/northbridge/intel/x4x/memmap.c
+++ b/src/northbridge/intel/x4x/memmap.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#define __SIMPLE_DEVICE__
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 8aab1f63bd57..45b6ce3248f9 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 90d8a449bfe1..330ce9ee7120 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index e0ce3404dfbb..ef1094f92c36 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <assert.h>
diff --git a/src/northbridge/intel/x4x/raminit_tables.c b/src/northbridge/intel/x4x/raminit_tables.c
index 1f8e97fba99f..3cd487978744 100644
--- a/src/northbridge/intel/x4x/raminit_tables.c
+++ b/src/northbridge/intel/x4x/raminit_tables.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <stdint.h>
diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c
index 3b59df2038b4..332d89c526dd 100644
--- a/src/northbridge/intel/x4x/rcven.c
+++ b/src/northbridge/intel/x4x/rcven.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/mmio.h>
diff --git a/src/northbridge/intel/x4x/romstage.c b/src/northbridge/intel/x4x/romstage.c
index aebec25bdb6f..5f47359c0972 100644
--- a/src/northbridge/intel/x4x/romstage.c
+++ b/src/northbridge/intel/x4x/romstage.c
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/pci_ops.h>
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h
index 23db61bf76e5..5418b4141d79 100644
--- a/src/northbridge/intel/x4x/x4x.h
+++ b/src/northbridge/intel/x4x/x4x.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
#ifndef __NORTHBRIDGE_INTEL_X4X_H__
#define __NORTHBRIDGE_INTEL_X4X_H__