summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/jasperlake/chip.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/jasperlake/chip.h')
-rw-r--r--src/soc/intel/jasperlake/chip.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 256fa06d8ded..f3e7240b57f4 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -142,10 +142,6 @@ struct soc_intel_jasperlake_config {
/* Gfx related */
uint8_t SkipExtGfxScan;
- /* HeciEnabled decides the state of Heci1 at end of boot
- * Setting to 0 (default) disables Heci1 and hides the device from OS */
- uint8_t HeciEnabled;
-
/* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */
uint8_t eist_enable;