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-rw-r--r--src/soc/intel/tigerlake/chip.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 59651d58b39d..538fe91fd9c0 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -276,10 +276,6 @@ struct soc_intel_tigerlake_config {
/* Gfx related */
uint8_t SkipExtGfxScan;
- /* HeciEnabled decides the state of Heci1 at end of boot
- * Setting to 0 (default) disables Heci1 and hides the device from OS */
- uint8_t HeciEnabled;
-
/* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */
uint8_t eist_enable;