3 files changed, 3 insertions, 17 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index fa950886841e..863150e7dc8d 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -78,6 +78,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
 	select SOC_INTEL_COMMON_BLOCK_SCS if SOC_INTEL_ALDERLAKE_PCH_N
 	select SOC_INTEL_COMMON_BLOCK_HDA
+	select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT
 	select SOC_INTEL_COMMON_BLOCK_IPU
 	select SOC_INTEL_COMMON_BLOCK_IRQ
 	select SOC_INTEL_COMMON_BLOCK_MEMINIT
diff --git a/src/soc/intel/alderlake/finalize.c b/src/soc/intel/alderlake/finalize.c
index 589ea5917a2c..880e1e02ed7c 100644
--- a/src/soc/intel/alderlake/finalize.c
+++ b/src/soc/intel/alderlake/finalize.c
@@ -106,6 +106,8 @@ static void soc_finalize(void *unused)
 	tbt_finalize();
 	sa_finalize();
 	heci_finalize();
+	if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
+		heci1_disable();
 
 	/* Indicate finalize step with post code */
 	post_code(POST_OS_BOOT);
diff --git a/src/soc/intel/alderlake/smihandler.c b/src/soc/intel/alderlake/smihandler.c
index 61fecdf7bc01..e1fc5a03ad0d 100644
--- a/src/soc/intel/alderlake/smihandler.c
+++ b/src/soc/intel/alderlake/smihandler.c
@@ -1,28 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <device/pci_def.h>
-#include <intelblocks/cse.h>
 #include <intelblocks/smihandler.h>
 #include <soc/soc_chip.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 
-/*
- * Specific SOC SMI handler during ramstage finalize phase
- *
- * BIOS can't make CSME function disable as is due to POSTBOOT_SAI
- * restriction in place from ADP chipset. Hence create SMI Handler to
- * perform CSME function disabling logic during SMM mode.
- */
-void smihandler_soc_at_finalize(void)
-{
-	if (!CONFIG(HECI_DISABLE_USING_SMM))
-		return;
-
-	if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
-		heci1_disable();
-}
-
 int smihandler_soc_disable_busmaster(pci_devfn_t dev)
 {
 	/* Skip disabling PMC bus master to keep IO decode enabled */