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* 3rdparty/blobs: update submodule pointerMatt DeVillier2023-08-061-0/+0
| | | | | | | | | | | Pull in commit adding signed verstage files for Google mainboards zork, guybrush, and skyrim. Change-Id: Ia3024622a622285b7b2a1f4eef88cf0e2927424e Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
* Update blobs submodule to upstream masterStefan Reinauer2023-06-121-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | Updating from commit id 9df5910: 2023-05-10 15:42:44 +0100 - (mb/starlabs/starbook/adl: Update EC binary to 1.13) to commit id 797e7fc: 2023-06-10 03:59:43 +0000 - (00730F01/binaryPI: fix firmware table lookup) This brings in 8 new commits: 797e7fc 00730F01/binaryPI: fix firmware table lookup ba23e82 cpu/intel/stm: Use URLs so a link is generated ecad6f8 cpu/intel/stm: Mark up file name as code/monospace 3434921 cpu/intel/stm: Use *firmware* over *BIOS* a683e04 cpu/intel/stm: Use official spelling of *Kaby Lake* ec80479 cpu/intel/stm: Remove blank line at end of README.md 22248b1 cpu/intel/stm: Remove blank line at start of README.md 475dce4 mb/google/utils: Add script to prepare PSP verstage for signing Change-Id: I0005c3950bcbdf407c2abfc254123931806952f2 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75792 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
* 3rdparty/blobs: Advance submodule pointerSean Rhodes2023-05-151-0/+0
| | | | | | | | | | | | | | | | | | | | | | This contains the following commits: * 9df5910: mb/starlabs/starbook/adl: Update EC binary to 1.13 * 65c8e9a: soc/mediatek/mt8188: Add scramble switch and fix 1RK register bit * 1a4c51c: soc/mediatek/mt8188: Add scramble switch for dpm version 0.2 * 076cdd1: soc/mediatek/mt8188: Update MCUPM firmware from v1.01.03 to v1.01.04 * 2be5f15: soc/mediatek/mt8186: Update SSPM firmware from v2.0.0 to v2.0.1 * 01ba156: mb/google/skyrim: Add RO SPL table * ce5566f: soc/mediatek/mt8186: Update SSPM firmware from v1.0.0 to v2.0.0 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Iee7b479f305b77f4e6ab5e53a0b74cebdc653599 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
* Update 3rdparty/blobs submoduleKarthikeyan Ramasubramanian2022-12-171-0/+0
| | | | | | | | | | | | | | | | | | | | | Updating from commit id f8e84db3: mainboard/starlabs/cezanne/starbook: Add EC binary 1.02 to commit id 01ba1566: mb/google/skyrim: Add RO SPL table This brings in 3 new commits: 01ba1566: mb/google/skyrim: Add RO SPL table ce5566fd: soc/mediatek/mt8186: Update SSPM firmware from v1.0.0 to v2.0.0 55d92ce7: soc/mediatek/mt8188: Update SSPM firmware from v1.88.00 to v1.88.01 Change-Id: Ie8e78f61556da268f74caaba211b30e70f984f13 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70776 Reviewed-by: Jon Murphy <jpmurphy@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: Advance submodule pointerSean Rhodes2022-11-071-0/+0
| | | | | | | | | | | | | | | | | | | This contains the following commits: * 835724d: mainboard/starlabs/starbook: Update the EC binaries for StarLabs * ecbe941: soc/mediatek: Update capitalization of coreboot * 0e4444e: soc/mediatek/mt8188: Update MCUPM firmware from v1.01.02 to v1.01.03 * 88570f6: mainboard/starlabs/starbook/adl: Update the EC binary to 1.01 by Sean Rhodes * f8e84db@ mainboard/starlabs/cezanne/starbook: Add EC binary 1.02 by Sean Rhodes Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I7afd43102718f211fe8d4fd69061dcdce5bfc323 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68587 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Update blobs submodule to upstream masterJon Murphy2022-10-021-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating from commit id d55c315: 2022-07-05 14:51:39 +0000 - (mb/starlabs: Remove padding from logo) to commit id 5a19332: 2022-09-28 20:00:40 +0000 - (mb/google/skyrim: Add SPL Table for ChromeOS) This brings in 10 new commits: 5a19332 mb/google/skyrim: Add SPL Table for ChromeOS a543a27 soc/mediatek/mt8188: Update MCUPM firmware from v1.01.01 to v1.01.02 9a76f55 soc/mediatek/mt8188: Update MCUPM firmware to v1.01.01 835f951 mb/google/skyrim: Add initial APCB release for skyrim board 4635ce0 soc/mediatek/mt8188: Add dram.elf version 0.1.0 for DRAM calibration 05afca2 soc/mediatek/mt8188: Add SPM firmware 3324df4 soc/mediatek/mt8188: Add dpm.pm and dpm.dm version 0.1 10a740e soc/mediatek/mt8188: Add SSPM firmware v1.88.00 db990c6 soc/mediatek/mt8188: Add MCUPM firmware v1.01.00 c5a4fda soc/mediatek/mt8188: Add MT8188 basic files Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Idac3c5eb7ad1eb586ca5a33c7f46e16c762948d3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67986 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: Advance submodule pointerSean Rhodes2022-07-071-0/+0
| | | | | | | | | | | | | | | | | | | This contains the following commits: * d55c315 mb/starlabs: Remove padding from logo * 6412d38 mb/starlabs/starbook/cml: Update EC from 1.03 to 1.07 * fb72ac5 mb/starlabs/starbook/tgl: Update EC from 1.00 to 1.03 * cda5eaa mb/starlabs: Rename labtop to starbook * f16020a Revert "soc/mediatek/mt8186: Update SPM firmware to pcm_suspend_v0215… This also changes starlabs/labtop Kconfig to use the new paths for the EC binaries from the above commits. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I83143118af422276ee335ad4ef9eca76f54a9fc0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65634 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
* Update blobs submodule to upstream masterRobert Zieba2022-03-241-0/+0
| | | | | | | | | | | | | | | | Updating from commit id f14575c: 2022-02-14 21:14:23 +0800 - (mb/google/guybrush: Add SPL table) to commit id 8c580e5: 2022-03-21 16:05:58 -0600 - (mb/google/guybrush: Update APCB file) This brings in 3 new commits. Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: Iee7a8c550a69bc50b82850b9bfac1a8ca5229557 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63027 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Update blobs submodule to upstream masterZheng Bao2022-02-151-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating from commit id b8e3eaf: 2021-07-15 08:09:11 +0000 - (mainboard/starlabs: Add files for Star Labs laptops) to commit id f14575c: 2022-02-14 21:14:23 +0800 - (mb/google/guybrush: Add SPL table) This brings in 11 new commits. 2021-07-15 08:09:11 +0000 - (mainboard/starlabs: Add files for Star Labs laptops) 2021-07-22 15:52:42 +0800 - (soc/mediatek/mt8195: Update MCUPM firmware from v1.00.00 to v1.01.00) 2021-07-22 17:11:04 +0800 - (soc/mediatek/mt8195: Add dram.elf for full calibration flow) 2021-07-29 16:19:31 +0800 - (soc/mediatek/mt8195: Add dpm.pm and dpm.dm version 1.0) 2021-10-06 16:18:46 +0800 - (soc/mediatek/mt8195: Update MCUPM firmware from v1.01.00 to v1.02.00) 2021-11-16 12:01:22 +0800 - (soc/mediatek/mt8186: Add MT8186 basic files) 2021-12-24 17:25:31 +0800 - (soc/mediatek/mt8186: Add SPM firmware) 2021-12-24 17:25:33 +0800 - (soc/mediatek/mt8186: Add SSPM firmware) 2022-01-21 10:30:35 +0800 - (soc/mediatek/mt8186: List `sspm.bin` in README) 2022-01-24 16:48:56 +0800 - (soc/mediatek/mt8186: Add dram.elf version 0.1.0 for DRAM calibration) 2022-02-09 14:53:44 +0800 - (soc/mediatek/mt8195: Update dram.elf from 1.7.1 to 1.8.1) 2022-02-14 21:14:23 +0800 - (mb/google/guybrush: Add SPL table) Change-Id: I0ced625982135c0cb7630cd0fb94cf78e3654673 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61935 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Rob Barnes <robbarnes@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: Update submoduleSean Rhodes2021-11-221-0/+0
| | | | | | | | | | | This brings in EC firmware binaries for Star Labs laptops, as well as a custom bootsplash image. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Iab5ff610b19fbe6a2e61999457a13a86d47f0ca7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57292 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* 3rdparty/blobs: Update blobs pointer to f388b6794e6fRaul E Rangel2021-04-071-0/+0
| | | | | | | | | | | | | | | | mb/google/guybrush: Update APCB - disable debug mb/google/guybrush: Add APCB to get through memory training soc/mediatek/mt8192: Add EMI Settings of 8GB Normal Mode soc/mediatek/mt8192: Update MCUPM firmware soc/mediatek/mt8192: Add version info for SSPM TEST=Boot guybrush to OS Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I445d753c712670fe80efcdf29459736df2b76666 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* Update blobs submodule to upstream masterMartin Roth2021-03-151-0/+0
| | | | | | | | | | | | | | | | | Updating from commit id 4fdfa1c: 2021-03-05 13:10:22 -0600 - (mb/amd/majolica: Update to use proper APCBs built for Majolica) to commit id fc2d4e2: 2021-03-12 10:31:48 -0700 - (mb/google/guybrush: Add initial APCB) This brings in 1 new commit. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I3003fdb8ba0bcfbc33452999c35a9a21775ecc10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51462 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* mb/amd/majolica: Update to use proper APCBs built for MajolicaMatt Papageorge2021-03-101-0/+0
| | | | | | | | | | | | | | | | Some of the previous binaries were incorrect and should not be used for Majolica because they are templates instead of APCBs specifically built for the board. This APCB update also places the UMA region under 4G and size 32 MB which is essential for video output. TEST=Boot with UEFI BIOS and verify we can get to OS. Also verify memory region size, base and alignment. Change-Id: Id797e2ad5bd67815c09752aedc19dad7dcf8ad12 Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51014 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* 3rdparty/blobs: advance submodule pointer.Ritul Guru2021-02-111-0/+0
| | | | | | | | | | This adds the apcb binary for Bilby. Change-Id: I1487369bc72734e875c5a701f27ed2d6af41cd01 Signed-off-by: Ritul Guru <ritul.bits@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50496 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* 3rdparty/blobs: advance submodule pointerFelix Held2021-01-191-0/+0
| | | | | | | | | | | | | | | | | | | | | | | This pulls in the following changes: * Drop geode_lx * cpu/amd/model_fxx: Drop unused microcode * cpu/amd/model_10xx: Drop unused microcode * soc/mediatek/mt8192: Add dram.elf for DRAM full calibration * soc/mediatek/mt8192: Add dpm binary * soc/mediatek/mt8192: Add 4266Mbps flag for dpm & dram blob * soc/mediatek/mt8192: add SPM firmware * soc/mediatek/mt8192: Support 26M clock off in SPM * soc/mediatek/mt8192: Add SSPM firmware * soc/mediatek/mt8192: Add MCUPM firmware * soc/mediatek/mt8192: Update MCUPM firmware * soc/mediatek/mt8192: Support discrete DRAM modules * mb/amd/majolica: Add APCB configuration files Change-Id: I5c18349307421707fac71f392b785f3e2bef3acb Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* 3rdparty/blobs: advance submodule pointerFelix Held2020-10-201-0/+0
| | | | | | | | | | | | | | | | The 3 commits commits from the blob repository this patch pulls in remove executable flags from files in the repo that shouldn't have those flags set: * pi/amd/00660F01/FP4/AGESA.bin: Remove execute file mode bit * Remove execute permission from all binaries * Remove execute permission from plaintext files Change-Id: I9c2b7c69f07e46bac466bfbfb277595c9fbc5a5a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46554 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* 3rdparty/blobs: advance submodule pointerFelix Held2020-09-301-0/+0
| | | | | | | | | | | | This pulls in the following changes: * soc/intel/baytrail/microcode.bin: Remove outdated microcode * mainboard/amd/mandolin: add Cereme APCB Change-Id: If6dd7881b346782635dec07710fe5c4449254e3c Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45851 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: advance submodule pointerFelix Held2020-06-191-0/+0
| | | | | | | | | | | | | | | Changes in 3rdparty/blobs: * Update of the OCP Tiogapass Flash descriptor binary * Move binary policy as README.md * Markdownify README.md * Add APCB binary for AMD Mandolin Change-Id: I0c45969626f30dca42bba1f137e85ec0999fc671 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* 3rdparty/blobs: Update to include STM binaryPatrick Georgi2020-02-051-0/+0
| | | | | | | | | | Change-Id: I5f053c1270bab71aeab3bb785c60417419736b44 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38717 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* 3rdparty/blobs: Add Facebook FBG1701 descriptor and Intel MEFrans Hendriks2019-11-151-0/+0
| | | | | | | | | | | | | | Upgrade to blobs version with descriptor and Intel ME binary BUG=N/A TEST=booting Facebook FBG1701 Change-Id: I2143b94a81eebfb22d99833aaf1f3743983dd80c Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34442 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: Update submodule for MT8183Dawei Chien2019-08-081-0/+0
| | | | | | | | | | | | | Update the 3rdparty/blobs submodule to the newest HEAD, which contains the SPM binary for MT8183 platforms ( https://review.coreboot.org/c/blobs/+/34543 ). Change-Id: I505ec9fffd9ddd62fffbe9514cbba50625825693 Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34734 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: Update submoduleJulius Werner2019-07-231-0/+0
| | | | | | | | | | | | | Uprev the 3rdparty/blobs submodule to the newest HEAD, which contains the SSPM binary for MT8183 platforms ( https://review.coreboot.org/c/blobs/+/32698 ). Change-Id: I8a4dfa7eaace1ea473f5970596c3201342e48927 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34494 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: Update submodule, SNB improvementsArthur Heymans2019-06-171-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | The sandybridge systemagent-r6 blob is modified: - To be more flexible about the location of the stack w.r.t. the heap - Place the MRC pool right below the MRC_VAR region - to work with the same DCACHE_RAM_BASE from the native raminit (could make the CAR linker symbols easily compatible if desired) This allows CAR setup compatibility between mrc.bin and native bootpath and also allows for BIOS/memory mappeds region larger than 8MB. This changes the semantics of CONFIG_DACHE_RAM_MRC_VAR_SIZE to also include the pool on top of MRC_VAR region. TESTED on T520 (boots and resumes from S3 with mrc.bin). Change-Id: I17d240656575b69a24718d90e4f2d2b7339d05a7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33228 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 3rdparty/blobs: Update submodule pointerNico Huber2019-03-071-0/+0
| | | | | | | | | | | | * Update SMU firmware for amd/stoneyridge * Remove stale Sandy Bridge MRC binaries Change-Id: Ifd1a9f02d96bc7cf5d23706a09634c0353dfae61 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31786 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* 3rdparty/blobs: Update for current Intel microcodeNico Huber2019-01-101-0/+0
| | | | | | | | | | | | The microcode included for `model_6xx` was for a 660, that path has changed. Change-Id: I09a41a8269cfdf8953bac10c9630922192851e73 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/30081 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* 3rdparty/blobs: Update video BIOS to customize release binaryRichard Spiegel2018-12-071-0/+0
| | | | | | | | | | | | | | | | | | | | | A liara specific VBIOS was released and merged to blobs. Now coreboot need to point to the updated blob, so it can use liara specific VBIOS. Liara Chromebook Stoney VBIOS BRT39865 BRT39865.001 12/05/18,01:13:54 CL#1716128 @ 15.49.0.18 ATOMBuild#436504 Major Changes included: 1. First Stoney VBIOS released to Liara update eDP power up sequence. BUG=b:120534087 TEST=none Change-Id: I3b060b1ccfb311584afd0fb66258eb7cc942408d Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/30089 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* 3rdparty/blobs: Add new blobRichard Spiegel2018-11-281-0/+0
| | | | | | | | | | | | | | | New VBIOS code has been added to blobs/mainboard/google/kahlee. It has been merged, so now coreboot needs to use latest blob. BUG=b:112618193 TEST=none Change-Id: If430ee06f03e0f20806bf8fd2b649814251ffcf5 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/29869 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
* 3rdparty/blobs: Update to include QuarkFspPatrick Georgi2018-10-121-0/+0
| | | | | | | | | Change-Id: I0032e86755750755e7ae6e2a53863e1600f96a5b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
* 3rdparty/blobs: Update submodule pointer to pull in latest changesPatrick Rudolph2018-07-271-0/+0
| | | | | | | | | | | | | | | * Include Cavium's CN81xx BL31.elf * mainboard/google: Add folder kahlee for video binary * Stoney Ridge: PSP bootloader update * cpu/intel: remove microcode header files for model_306ax Change-Id: Ie8f3b2e8db0692e95caee245733054e4e20f61ea Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/27647 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
* 3rdparty/blobs: Update submodule pointer to include latest AMD ucodePaul Menzel2018-07-021-0/+0
| | | | | | | | | | | | | | | The two commits below are added to the BLOBs repository. * fe7c6a3 pcengines/apu2: Disable ECC Exclusion range * 3854ad2 cpu/amd/family_15h: Add latest AMD ucode file The latest AMD microcode patches include Spectre mitigations. Change-Id: I4729cc054fe8267549d7369cea4d26aa51861e1c Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/27297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* 3rdparty/blobs: Update submodule marker for Intel microcode updatesMartin Kepplinger2018-05-151-0/+0
| | | | | | | | | | | | | | | | | | This adds the following changes to the blobs repository: 78a02a7 cpu/intel: microcode: add license agreement 1d37962 cpu/intel: add microcode updates 20180312 for new CPU models 8b8bbce cpu/intel: apply microcode updates 20180312 to currently tracked models In short: Bump Intel microcode updates. They include spectre/meltdown mitigations. Change-Id: I141f4446bc4e3bff5641bc39b70b299dc09ac8a7 Signed-off-by: Martin Kepplinger <martink@posteo.de> Reviewed-on: https://review.coreboot.org/26270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Revert "3rdparty/blobs: Update submodule marker for Intel microcode updates"Nico Huber2018-05-121-0/+0
| | | | | | | | | | | | | | | This reverts commit 0ff9daac45d604fa4864394616e335e20af26c3e. It points to a stale commit under review; i.e. not to a commit on blob.git's master branch like it's supposed to. Change-Id: I19cb8a32b3971c3104e381673ca08ae4d3979128 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* 3rdparty/blobs: Update submodule marker for Intel microcode updatesMartin Kepplinger2018-05-111-0/+0
| | | | | | | | | | | | | | | | | | | This moves the blobs submodule marker forward to include the following: b45abbd cpu/intel: microcode: add license agreement 1d37962 cpu/intel: add microcode updates 20180312 for new CPU models 8b8bbce cpu/intel: apply microcode updates 20180312 to currently tracked models in short: bump Intel's microcode updates to the latest version. This includes Spectre/Meltdown mitigations. Change-Id: I4ab74ae0bdcf2a109b0697ad233fbb812b5c4544 Signed-off-by: Martin Kepplinger <martink@posteo.de> Reviewed-on: https://review.coreboot.org/25505 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* stoneyridge: Update AGESA binary and AGESA.hRichard Spiegel2018-03-161-0/+0
| | | | | | | | | | | | | | | | AGESA.bin was updated in the binary repo, so update the submodule pointer. Among other changes, this added a callback "AGESA_HALT_THIS_AP", which requires updated header files. BUG=b:70338633 TEST=build kahlee. Change-Id: I5a07f1c539d00aed34cfe45d6d7ef60c1dc56566 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/25183 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Update blobs submodule to upstream masterMarc Jones2018-02-051-0/+0
| | | | | | | | | | | | | | | | | | Updating from commit id a5efee5: 2018-01-04 16:24:19 -0700 - (Kahlee/Grunt: Move remaining stoneyridge blobs) to commit id 19dea8d: 2018-02-01 08:51:06 -0700 - (soc/amd/Stoneyridge: Update PSP binaries to AGESA 1.3.0.9) This brings in 2 new commits. Change-Id: I7858ad8be13d9992949effb0216723d2480fa74d Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/23562 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
* src/soc/amd/stoneyridge/Kconfig: Use vbios new locationRichard Spiegel2018-01-251-0/+0
| | | | | | | | | | | | | | | | | | 3rdparty/blobs was updated to move northbridge/amd/00670F00 contents into soc/amd/stoneyridge. Now soc/amd/stoneyridge/Kconfig needs to be updated to use VBIOS.bin new location. BUG=b:70785272 TEST=Update 3rdparty/blobs master branch, try to build kahlee. It should fail. Update soc/amd/stoneyridge/Kconfig, try to build kahlee again, it should work (need to rebuild .config first). CQ-DEPEND=CL:881709 Change-Id: I8cb9874eedc4a5d41d42b3f727c6d3cb9b920b5a Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/23398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* 3rdparty/blobs/soc/amd/stoneyridge: Use new location of stoneyridge blobRichard Spiegel2018-01-071-0/+0
| | | | | | | | | | | | | | | Stoneyridge related contents of 3rdparty/blobs/southbridge/amd/kern were moved to 3rdparty/blobs/southbridge/amd/stoneyridge. Commit the new blob to coreboot, and modify src/soc/amd/stoneyridge/Kconfig to use it. BUG=b:69613465 TEST=Build and run kahlee. Change-Id: I1784824dc7767c620e2fcbad7c6e5674934832ff Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/23125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* 3rdparty/blobs: Update submoduleMartin Roth2017-06-271-0/+0
| | | | | | | | | | | | | Update blobs pointer to bring in the AGESA.bin changes for amd/00670F00/FP4 and amd/00670F00/FT4. Change-Id: I739124090e41edaf76210cda6189b2c7545cdf58 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20324 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* 3rdparty/blobs: Update for AMD Stoney RidgeMarshall Dawson2017-03-281-0/+0
| | | | | | | | | | | Add the binaryPI file for the FT4 package and add SMU firmware to be consumed by fanless OPNs. Change-Id: I1c9b5ded6b494fac1553cc2ec7756a7a47386ecf Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18988 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* 3rdparty/blobs: Update for AMD Stoney RidgeMarshall Dawson2016-12-151-0/+0
| | | | | | | | | | | Update the blobs submodule to bring in the binaries for 00670F00. This also corrects some formatting in the various license.txt files. Change-Id: I7a70d1168734d06ef6919d83dd73bc8f2bc4173c Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/17872 Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Tested-by: build bot (Jenkins)
* 3rdparty/blobs: Update to get AGESA binary for pcengines/apu2Martin Roth2016-08-211-0/+0
| | | | | | | | | | | | The AGESA binary for PC Engines' APU2 board was just added to the blobs directory. Update the submodule pointer to allow access. Change-Id: Ic2995f253d12d17e229526cb71dea5bf65fa36f9 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16253 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
* 3rdparty/blobs: add more Qualcomm stubsPatrick Georgi2016-05-101-0/+0
| | | | | | | | Change-Id: Ie57b0b7844f28671b8d6a8efe9231a47bfb8f805 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14745 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* 3rdparty/blobs: Update for latest Carrizo BlobsMartin Roth2015-12-071-0/+0
| | | | | | | | | | | Update the 3rdparty/blobs submodule to bring in the latest CarrizoPI binaries. Change-Id: I65769ebe7b2aa6508d0d6ab2df34a092751e1078 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12425 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFSTimothy Pearson2015-10-161-0/+0
| | | | | | | | Change-Id: I208b012c6b612a94b3bbc8235d5a005028be8bcc Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11832 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* 3rdparty/blobs: Update hash to latest commit in BLOBs repositoryPaul Menzel2015-10-111-0/+0
| | | | | | | | | | | | | | | | | Update to commit 832bc6f1 (Remove microcode stored in C-array format), which is the latest commit in the BLOBs repository. Building the Lenovo X60 currently fails as the microcode file cannot be found. CREATE build/mainboard/lenovo/x60/cbfs-file.wkWhPK.out (from src/mainboard/lenovo/x60/cmos.default) make: *** No rule to make target '3rdparty/blobs/cpu/intel/model_69x/microcode.bin', needed by 'build/cpu_microcode_blob.bin'. Schluss. Change-Id: I40ebceec299f46c19fd60861d872adcd91df3610 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/11865 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
* 3dparty/blobs: Advance to pull in binary microcodeAlexandru Gagniuc2015-09-291-0/+0
| | | | | | | | Change-Id: I2071586e1f3b4464464928c11475f9283084dbcd Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11693 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
* Move blobs marker forwardStefan Reinauer2015-08-071-0/+0
| | | | | | | | | | | | | b4ade40 via/nano: Move CPU microcode to 3rdparty/blobs 8921cc4 amd/model_fxx: Move CPU microcode to 3rdparty/blobs 1099605 amd/model_10xxx: Move CPU microcode to 3rdparty/blobs 5f5604e Convert microcode to binary Change-Id: I276537281a01f8497ed87108e66574ec45265f3a Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/11129 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
* blobs: move markerStefan Reinauer2015-07-071-0/+0
| | | | | | | | | | | | | | | Makes the following changes available: 61d663e blobs: Fix assembler code to allow dropping -Wa,--divide a6c34a6 AMD Steppe Eagle: add PlatformMemoryConfiguration.h 95b8050 AMD FT3b binary PI: Fix Windows 7 graphics driver hang c7c816e AMD Kern: remove PspSecureOs_prod_CZ.sbin Change-Id: Ie8ce8278f72c998b91717658a6fc1d0948c7c50a Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10824 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* 3rdparty/blobs: Move submodule marker forwardMarc Jones2015-06-201-0/+0
| | | | | | | | | | | | | Pick up the latest from blobs. 34b0926 AMD Merlin Falcon: remove build warnings e581a5c AMD pi: replace LocateModule with agesawrapper_locate_module c5ddfb6 AMD PI: remove unuseful code Change-Id: I2b9d2b61cb00aa651b90dc76368d215077e27cad Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/10603 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* 3rdparty/blobs: Move marker forwardStefan Reinauer2015-06-151-0/+0
| | | | | | | | Change-Id: I2a9304a6b573a10e896f9ff77bfb09f20b21eb50 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10541 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-05 12:38:32 +0000