| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Enable caching for Via C7 CPUs, and also improve readability. Tested on hardware | Corey Osgood | 2009-04-14 | 1 | -18/+21 |
| * | Add AP detection to stage0 to prevent APs from re-initializing mainboard setup | Marc Jones | 2009-02-10 | 1 | -0/+4 |
| * | Right now we face the problem that we can't support processors which | Carl-Daniel Hailfinger | 2008-10-16 | 1 | -1/+1 |
| * | Whitespace fixes, readability improvements. | Carl-Daniel Hailfinger | 2008-10-11 | 1 | -5/+5 |
| * | Add support for Cache-as-RAM on VIA C7 processors in v3. | Carl-Daniel Hailfinger | 2008-10-11 | 1 | -0/+207 |
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