summaryrefslogtreecommitdiffstats
path: root/src/arch/x86/postcar_loader.c
Commit message (Expand)AuthorAgeFilesLines
* cbfs: Remove prog_locate() for stages and rmodulesJulius Werner2021-03-161-3/+0
* stage_cache: Add resume_from_stage_cache()Kyösti Mälkki2021-01-291-3/+1
* arch/x86/postcar_loader: Remove unused 'include <cpu/cpu.h>'Elyes HAOUAS2020-07-141-1/+0
* arch/x86/postcar_loader: utilize var_mtrr_context APIAaron Durbin2020-06-021-46/+19
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* arch/x86: unexpose postcar_frame_common_mtrrs()Aaron Durbin2020-05-071-1/+1
* src/arch/x86: Convert to SPDX license headerPatrick Georgi2020-03-061-12/+2
* arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHEKyösti Mälkki2019-12-191-0/+10
* console,boot_state: Exclude printk() from reported timesKyösti Mälkki2019-11-111-0/+2
* security/vboot: Removed vboot_prepare from vboot_locatorWim Vervoorn2019-11-051-0/+3
* Program loading: Handoff cbmem_top via calling argumentsArthur Heymans2019-10-301-0/+2
* arch/x86: Cache the TSEG region at the top of ramSubrata Banik2019-09-111-0/+18
* AUTHORS: Move src/arch/x86 copyrights into AUTHORS fileMartin Roth2019-09-101-2/+0
* arch/x86: Remove WB attribute from 0..CACHE_TMP_RAMTOPKyösti Mälkki2019-08-311-3/+0
* arch/x86/postcar: unexpose postcar_commit_mtrrs() symbolAaron Durbin2019-08-281-2/+1
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-0/+15
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-1/+1
* arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki2019-08-151-0/+12
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-0/+9
* stage_cache: Make empty inline function if CONFIG_NO_STAGE_CACHE enableSubrata Banik2019-06-131-2/+1
* post_code: add post code for failure to load next stageKeith Short2019-05-221-3/+6
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-3/+3
* prog_loader: Associate TS_END_ROMSTAGE timestamp with postcar if existSubrata Banik2019-03-071-0/+4
* arch/x86 cbmem: Drop tests for LATE_CBMEM_INITKyösti Mälkki2018-12-221-10/+0
* include/program_loading: Add POSTCAR prog typePhilipp Deppenwiese2018-11-091-1/+1
* arch/x86: Introduce postcar_frame_add_romcache()Nico Huber2018-06-041-0/+7
* arch/x86/postcar: add comment clarifying reason for finalize_load()Aaron Durbin2018-04-241-0/+3
* arch/x86: Fix typo with MTRRKyösti Mälkki2017-09-131-7/+7
* arch/x86 postcar: Fix use with stage_cacheKyösti Mälkki2017-09-081-10/+16
* postcar_loader: Support LATE_CBMEM_INIT boardsKyösti Mälkki2016-12-091-10/+21
* CPU: Declare cpu_phys_address_size() for all archKyösti Mälkki2016-12-061-0/+1
* arch/x86: cache postcar in stage cacheAaron Durbin2016-12-011-7/+21
* arch/x86: Utilize additional MTRRs in postcar_frame_add_mtrrRizwan Qureshi2016-09-121-22/+37
* arch/x86: Always compile postcar library in romstageRizwan Qureshi2016-09-121-6/+12
* lib/prog_loading: introduce prog_segment_loaded()Aaron Durbin2016-04-021-1/+1
* arch/x86: notify the system when the postcar parameter was updatedAaron Durbin2016-04-021-0/+7
* arch/x86: introduce postcar stage/phaseAaron Durbin2016-03-231-0/+115
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-16 12:34:09 +0000