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* libpayload: arm64: Conform to new coreboot lib_helpers.h and assume EL2Julius Werner2018-10-121-0/+4
* selfboot: remove bounce buffersRonald G. Minnich2018-10-117-228/+9
* riscv: add physical memory protection (PMP) supportXiang Wang2018-10-113-0/+355
* Move compiler.h to commonlibNico Huber2018-10-0831-40/+0
* arch/riscv: Update comment about mstatus initializationJonathan Neuschäfer2018-10-062-2/+2
* arch/x86: Make mb/romstage.c optionalRizwan Qureshi2018-10-041-1/+1
* arch/riscv: Adjust compiler flags for scan-buildJonathan Neuschäfer2018-10-041-1/+6
* arch/riscv: Advance the PC after handling misaligned load/storeJonathan Neuschäfer2018-09-261-4/+13
* arch/{mips,power8}/include/arch: Don't use device_tElyes HAOUAS2018-09-212-2/+2
* arch/riscv/include/arch: Don't use device_tElyes HAOUAS2018-09-211-1/+1
* arch/arm/include/armv7/arch: Remove dead codeElyes HAOUAS2018-09-191-10/+0
* acpi: Call acpi_gen_writeSTA by status from device treeHung-Te Lin2018-09-162-0/+10
* riscv: don't write to mstatus.XSXiang Wang2018-09-161-1/+0
* arch/x86/acpi_bert_storage.c: Fix coverity error CID 1395706Richard Spiegel2018-09-151-3/+3
* arch/riscv: Configure delegation only if S-mode is supportedJonathan Neuschäfer2018-09-151-5/+7
* arch/x86/acpigen: Fix comment in _ROM method generatorJonathan Neuschäfer2018-09-141-1/+1
* arch/riscv: Only execute on hart 0 for nowPhilipp Hug2018-09-141-0/+6
* arch/riscv: provide a monotonic timerPhilipp Hug2018-09-145-4/+48
* arch/riscv: add missing endian.h header to io.hPhilipp Hug2018-09-141-0/+1
* complier.h: add __always_inline and use it in code baseAaron Durbin2018-09-1414-56/+75
* riscv: update misaligned memory access exception handlingXiang Wang2018-09-105-68/+652
* riscv: update mtime initializationXiang Wang2018-09-102-3/+4
* x86/acpi: Add BERT tableMarshall Dawson2018-09-072-0/+29
* x86/acpi: Add BERT to the revision tableMarshall Dawson2018-09-071-0/+2
* arch/x86: Add BERT region support functionsMarshall Dawson2018-09-073-0/+714
* chromeos/gnvs: remove function and naming cleanupJoel Kitching2018-09-061-1/+2
* x86/acpi: Add APEI definitionsMarshall Dawson2018-09-061-0/+62
* arch/x86/Makefile: include dependencies for romcc bootblockNico Huber2018-09-051-0/+1
* riscv: add entry assembly file for RAMSTAGEXiang Wang2018-09-053-1/+60
* riscv: add support to check machine length at runtimeXiang Wang2018-09-051-0/+6
* riscv: add spin lock supportXiang Wang2018-09-041-0/+28
* riscv: Add DEFINE_MPRV_READ_MXR to read execution-only pageXiang Wang2018-09-041-3/+16
* riscv: separately define stack locations at different stagesXiang Wang2018-09-021-0/+14
* riscv: update the definition of intptr_t/uintptr_tXiang Wang2018-08-301-2/+2
* acpi: Hide Chrome and coreboot specific devicesDavid Wu2018-08-282-1/+4
* x86/acpi: Update MADT table versionMarc Jones2018-08-271-1/+1
* x86/acpi: Add ACPI table revision functionMarc Jones2018-08-272-17/+80
* acpi: remove CBMEM_ID_ACPI_GNVS_PTR entryJoel Kitching2018-08-223-14/+5
* arm64: Factor out common parts of romstage execution flowJulius Werner2018-08-173-0/+47
* x86/acpigen: Fix ACPI _ROM methodMarc Jones2018-08-171-1/+1
* arch/x86/acpigen: add methods for cppcMatt Delco2018-08-172-0/+108
* arch/x86/acpigen: refactor calls to acpigen_write_registerMatt Delco2018-08-152-11/+12
* cbmem: rename vdat to chromeos_acpiJoel Kitching2018-08-141-1/+1
* arm64: mmu: Spot check security state for TTB mappingJulius Werner2018-08-131-5/+12
* arm64: Turn architectural register accessors into inline functionsJulius Werner2018-08-1010-1536/+244
* arm64: Drop checks for current exception level, hardcode EL3 assumptionJulius Werner2018-08-1011-713/+36
* arm64: Remove set_cntfrq() functionJulius Werner2018-08-103-51/+1
* arch/x86/tables.c: Avoid static analysis error for unused valueRichard Spiegel2018-08-091-0/+3
* src/arch: Fix typoElyes HAOUAS2018-08-094-4/+4
* arch/x86/exception.c: Remove double initializationRichard Spiegel2018-08-091-1/+1
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