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path: root/src/cpu/intel/car/non-evict/cache_as_ram.S
Commit message (Expand)AuthorAgeFilesLines
* cpu/x86/64bit: Turn jumping to long mode into a macroArthur Heymans2024-02-081-2/+2
* x86: Add .data section support for pre-memory stagesJeremy Compostella2023-09-141-0/+3
* src/*/post_code.h: Change post code prefix to POSTCODEYuchen He2023-08-051-8/+8
* commonlib/console/post_code.h: Change post code prefix to POSTCODElilacious2023-06-231-2/+2
* cpu/intel: Fix clearing MTRR for clang 64bitArthur Heymans2022-12-161-5/+6
* cpu/intel/car: Define post codesMartin Roth2022-11-231-9/+10
* arch/x86: Move prologue to .init sectionKyösti Mälkki2021-01-071-0/+1
* cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph2020-11-021-6/+19
* cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki2020-06-131-11/+12
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-12/+2
* cpu/intel: Remove ROMCC header guards and codeElyes HAOUAS2019-12-171-3/+0
* Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans2019-11-251-1/+1
* arch/x86/car.ld: Rename suffix _start/_endArthur Heymans2019-11-121-1/+1
* AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth2019-09-101-4/+0
* cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-04-211-0/+5
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-2/+2
* cpu/intel/car/*/cache_as_ram.S: Add brackets around operandArthur Heymans2019-02-101-1/+1
* cpu/intel/car: Remove unneeded white spaceElyes HAOUAS2019-01-171-2/+2
* cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setupArthur Heymans2019-01-151-0/+13
* cpu/intel/car/non-evict: Update microcode in CAR setupArthur Heymans2019-01-141-7/+36
* cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCKKyösti Mälkki2019-01-081-14/+16
* car/non-evict/cache_as_ram.S: Use tabs instead of spacesArthur Heymans2018-12-211-5/+5
* cpu/intel/car: Align the stack to 16 bytes before romstage_mainArthur Heymans2018-08-131-0/+5
* cpu/intel/car/non-evict: Improve a few thingsArthur Heymans2018-06-051-31/+47
* cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans2018-06-051-0/+193
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