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path:
root
/
src
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cpu
/
intel
/
model_206ax
/
Makefile.inc
Commit message (
Expand
)
Author
Age
Files
Lines
*
nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-11-18
1
-1
/
+5
*
cpu/intel/common: Move intel_ht_sibling() to common folder
Patrick Rudolph
2019-10-01
1
-1
/
+0
*
cpu/intel: Use CPU_INTEL_COMMON_TIMEBASE
Kyösti Mälkki
2019-09-24
1
-5
/
+0
*
intel/nehalem,sandybridge: Move stage_cache support function
Kyösti Mälkki
2019-08-07
1
-4
/
+0
*
arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class
Kyösti Mälkki
2019-07-09
1
-3
/
+3
*
Use 3rdparty/intel-microcode
Arthur Heymans
2019-07-01
1
-2
/
+2
*
security/vboot: Add measured boot mode
Philipp Deppenwiese
2019-02-25
1
-0
/
+1
*
cpu/intel/model_206ax: Remove the notion of sockets
Arthur Heymans
2019-01-24
1
-0
/
+8
*
intel/sandybridge: Don't hardcode platform type
Patrick Rudolph
2018-07-28
1
-0
/
+4
*
cpu/intel/model_206ax: Switch to POSTCAR_STAGE
Arthur Heymans
2018-06-05
1
-4
/
+1
*
cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support
Arthur Heymans
2018-06-05
1
-0
/
+6
*
cpu/intel/sandybridge: Put stage cache into TSEG
Arthur Heymans
2018-04-10
1
-0
/
+3
*
cpu/intel/model_206ax: Use tsc monotonic timer
Patrick Rudolph
2017-06-09
1
-0
/
+4
*
cpu/intel/common: Add/Use common function to set virtualization
Matt DeVillier
2016-12-27
1
-0
/
+1
*
intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-22
1
-0
/
+1
*
cpu: microcode: Use microcode stored in binary format
Alexandru Gagniuc
2015-09-30
1
-1
/
+2
*
x86: remove cpu_incs as romstage Make variable
Aaron Durbin
2015-09-04
1
-1
/
+1
*
Create i945-ivy smm tseg init based on ivy code.
Vladimir Serbinenko
2015-06-09
1
-2
/
+1
*
Migrate 206ax to SMM_MODULES
Vladimir Serbinenko
2015-05-28
1
-0
/
+2
*
ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
Vladimir Serbinenko
2014-10-16
1
-1
/
+1
*
Get rid of drivers class
Patrick Georgi
2012-11-27
1
-1
/
+1
*
buildsystem: Make CPU microcode updating more configurable
Alexandru Gagniuc
2012-09-05
1
-0
/
+2
*
Add support for Intel Sandybridge CPU
Stefan Reinauer
2012-04-05
1
-0
/
+8