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path: root/src/cpu/intel/model_206ax/cache_as_ram.inc
Commit message (Expand)AuthorAgeFilesLines
* cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans2018-06-051-315/+0
* Use more secure HTTPS URLs for coreboot sitesPaul Menzel2017-06-071-1/+1
* intel/sandybridge: Use postcar_frame for MTRR setupKyösti Mälkki2016-12-091-3/+21
* intel/sandybridge post-car: Redo MTRR settings and stack selectionKyösti Mälkki2016-11-181-33/+23
* intel cache-as-ram: Unify stack setupKyösti Mälkki2016-11-111-6/+2
* intel/sandybridge: Use common ACPI S3 recoveryKyösti Mälkki2016-11-111-23/+0
* src/cpu: Capitalize ROM and RAMElyes HAOUAS2016-07-311-1/+1
* intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki2016-07-261-4/+7
* intel car: Unify postcodesKyösti Mälkki2016-07-221-3/+1
* intel car: Unify whitespace and comment fixesKyösti Mälkki2016-07-221-4/+4
* Ignore RAMTOP for MTRRsKyösti Mälkki2016-06-221-1/+1
* intel/model_206ax: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki2016-06-221-2/+8
* intel/model_206ax: Move platform specific definesKyösti Mälkki2016-06-171-1/+1
* Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki2016-06-171-0/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc2015-10-151-24/+24
* Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth2015-08-251-4/+0
* x86: Drop -Wa,--divideStefan Reinauer2015-07-071-3/+3
* Remove empty lines at end of fileElyes HAOUAS2015-06-081-1/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* x86 romstage: Move stack just below RAMTOPKyösti Mälkki2014-10-191-2/+1
* Rename coreboot_ram stage to ramstageFurquan Shaikh2014-04-261-1/+1
* Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki2014-01-151-2/+2
* usbdebug: Put ehci_debug_info in CAR_GLOBALKyösti Mälkki2013-07-101-9/+0
* copy_and_run: drop boot_complete parameterStefan Reinauer2013-05-081-5/+0
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-011-1/+1
* Intel cpus: Extend cache to cover complete Flash DeviceKyösti Mälkki2012-07-041-2/+4
* Intel cpus: use CPU_ADDR_BITS from Kconfig during CARKyösti Mälkki2012-07-041-2/+1
* Replace cache control magic numbers with symbolsPatrick Georgi2012-04-251-7/+8
* Add support for Intel Sandybridge CPUStefan Reinauer2012-04-051-0/+348
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