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* arch to cpu: Add SPDX license headers to Kconfig filesMartin Roth2024-02-181-0/+2
* cpu: Rename Makefiles from .inc to .mkMartin Roth2024-01-241-0/+0
* cpu: Add SPDX license headers to MakefilesMartin Roth2023-08-061-0/+2
* arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminatorFelix Held2023-02-091-1/+1
* arch/x86/cpu: introduce and use device_match_maskFelix Held2023-02-081-7/+7
* aopen/dxplplusu: Support SMM_ASEG and SMM_TSEGKyösti Mälkki2022-11-284-37/+106
* Revert "mb/aopen/dxplplusu: Remove board"Kyösti Mälkki2022-11-093-0/+79
* mb/aopen/dxplplusu: Remove boardArthur Heymans2022-11-073-59/+0
* cpu/intel/model_fxx: Select SSE2Arthur Heymans2022-06-021-0/+1
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-4/+0
* src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper functionFelix Held2021-10-262-2/+1
* cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPERFelix Held2021-10-261-0/+1
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
* cpu/intel/hyperthreading: Build only for selected modelsKyösti Mälkki2021-06-071-0/+1
* cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner2020-10-171-1/+0
* arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons2020-09-261-4/+1
* cpu,soc/intel: Drop select SMPKyösti Mälkki2020-07-261-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-12/+2
* cpu/intel/common: Move intel_ht_sibling() to common folderPatrick Rudolph2019-10-012-0/+3
* intel/socket_mPGA604: Enable TSC_CONSTANT_RATEKyösti Mälkki2019-09-241-0/+2
* cpu/x86: Declare SMM_ASEGKyösti Mälkki2019-07-091-0/+1
* Use 3rdparty/intel-microcodeArthur Heymans2019-07-011-1/+1
* cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded includeElyes HAOUAS2018-06-061-3/+0
* Constify struct cpu_device_id instancesJonathan Neuschäfer2017-11-231-1/+1
* src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS2016-08-231-1/+1
* src/cpu: Capitalize CPUElyes HAOUAS2016-07-311-2/+2
* CPU/intel: Add missing license headersDamien Roth2016-02-141-0/+13
* cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc2015-09-302-5/+1
* 3rdparty: move to 3rdparty/blobsPatrick Georgi2015-05-051-1/+1
* 3rdparty: Move to blobsPatrick Georgi2015-05-051-1/+1
* cpu/intel: (non-FSP) Remove microcode updates from treeAlexandru Gagniuc2015-02-2816-2958/+0
* cpu/intel (non-FSP): Use microcode from blobs repositoryAlexandru Gagniuc2015-02-281-19/+1
* vboot2: add verstageStefan Reinauer2015-01-271-0/+1
* {arch,cpu,drivers,ec}: Don't hide pointers behind typedefsEdward O'Callaghan2014-10-271-1/+1
* Introduce stage-specific architecture for corebootFurquan Shaikh2014-05-061-1/+3
* Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh2014-05-031-0/+1
* PCI: Drop includes under cpuKyösti Mälkki2014-02-121-1/+0
* cpu/intel: Remove dummy terminators from microcode blobsAlexandru Gagniuc2014-01-161-11/+0
* cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc2014-01-164-35/+37
* Get rid of drivers classPatrick Georgi2012-11-271-1/+1
* Revert "Use broadcast SIPI to startup siblings"Sven Schnelle2012-07-311-0/+3
* Use broadcast SIPI to startup siblingsSven Schnelle2012-07-021-3/+0
* Intel CPUs: execute microcode update only once per coreKyösti Mälkki2012-07-021-4/+8
* MTRR: get physical address size from CPUIDSven Schnelle2012-01-101-1/+1
* Activate older Xeon P4 microcodesKyösti Mälkki2011-10-181-1/+2
* update intel microcode files.Stefan Reinauer2010-10-1820-1683/+2465
* Remove some duplicate #include files (trivial).Uwe Hermann2010-10-071-1/+1
* Rename build system variables to be more intuitive, andPatrick Georgi2010-09-301-1/+1