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* sandybridge: Disable parallel CPU initializationNico Huber2015-11-161-1/+0
* cpu/intel/fsp_model_206ax: Load microcode in corebootMartin Roth2015-10-283-6/+6
* cpu/intel: Move Power notification ASL code into `common/acpi`Paul Menzel2015-10-231-0/+0
* Revert "Remove sandybridge and ivybridge FSP code path"Martin Roth2015-10-2211-0/+1219
* cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc2015-10-1513-178/+178
* Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth2015-10-1410-0/+955
* arch/x86/bootblock: Do not include non-code files in bootblock.SAlexandru Gagniuc2015-10-083-0/+2
* x86/bootblock: Use LDFLAGS_bootblock to enable garbage collectionAlexandru Gagniuc2015-10-071-1/+1
* Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc2015-10-0310-955/+0
* Remove sandybridge and ivybridge FSP code pathAlexandru Gagniuc2015-10-0311-1219/+0
* sandybridge ivybridge: Treat native init as first class citizenAlexandru Gagniuc2015-10-031-2/+2
* cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc2015-09-3049-277/+27
* coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin2015-09-241-1/+0
* intel/model_2065x/Kconfig: Don't use LAPIC_MONOTONIC_TIMERMartin Roth2015-09-091-1/+0
* x86: remove cpu_incs as romstage Make variableAaron Durbin2015-09-0412-12/+12
* Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth2015-08-254-16/+0
* Add SoC specific microcode update check in ramstageRizwan Qureshi2015-07-291-0/+16
* x86: Drop -Wa,--divideStefan Reinauer2015-07-076-15/+15
* model_2065x: Use common i945-ivy TSEG SMM init.Vladimir Serbinenko2015-06-103-296/+24
* model_206ax: Fix APIC map when HT is disabled.Vladimir Serbinenko2015-06-102-18/+30
* fsp_model_206ax: Use common i945-ivy tseg SMM init.Vladimir Serbinenko2015-06-103-335/+18
* stage_cache: use cbmem init hooksAaron Durbin2015-06-091-10/+5
* Create i945-ivy smm tseg init based on ivy code.Vladimir Serbinenko2015-06-095-94/+74
* Remove empty lines at end of fileElyes HAOUAS2015-06-0810-10/+0
* device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens2015-06-056-6/+6
* Remove address from GPLv2 headersPatrick Georgi2015-06-043-3/+3
* cbfs: new API and better program loadingAaron Durbin2015-06-021-7/+11
* smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko2015-05-284-4/+0
* Migrate fsp_206ax to SMM_MODULESVladimir Serbinenko2015-05-284-0/+337
* Migrate 2065x to SMM_MODULESVladimir Serbinenko2015-05-284-0/+297
* Migrate 206ax to SMM_MODULESVladimir Serbinenko2015-05-284-0/+337
* intel: Remove pstate_coord_type.Vladimir Serbinenko2015-05-285-10/+0
* Move TPM code out of chromeosVladimir Serbinenko2015-05-271-4/+4
* acpigen: Remove all explicit length trackingVladimir Serbinenko2015-05-262-20/+12
* speedstep: Don't supply weak get_cst_entries.Vladimir Serbinenko2015-05-261-13/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-2182-109/+82
* intel/haswell: Drop MONOTONIC_TIMER_MSRPatrick Georgi2015-05-192-9/+3
* Include back the 306ax microcode again.Vladimir Serbinenko2015-05-131-0/+1
* 3rdparty: move to 3rdparty/blobsPatrick Georgi2015-05-0519-20/+20
* 3rdparty: Move to blobsPatrick Georgi2015-05-0519-20/+20
* haswell: Link stage_cache_external_region into ramstage, tooSol Boucher2015-05-053-10/+33
* cpu: get rid of socket source codeStefan Reinauer2015-05-0430-135/+0
* cpu/intel/haswell: remove dependency on socket_rpga989Matt DeVillier2015-04-302-0/+10
* Kconfig whitespace fixesMartin Roth2015-04-281-1/+1
* Fix some minor Kconfig issuesMartin Roth2015-04-281-0/+1
* fsp: Move fsp to fsp1_0Marc Jones2015-04-242-2/+2
* coreboot: common stage cacheAaron Durbin2015-04-221-11/+15
* build system: normalize linker script file namesPatrick Georgi2015-03-281-0/+0
* haswell: Fix monotonic timer integrationStefan Reinauer2015-03-172-1/+1
* cpu/intel/2065x: add define for MSR IA32_FERR_CAPABILITYAlexander Couzens2015-03-131-0/+2
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