summaryrefslogtreecommitdiffstats
path: root/src/cpu/intel
Commit message (Expand)AuthorAgeFilesLines
* cpu/intel/model_6fx: Include Conroe-L microcodeArthur Heymans2020-08-171-1/+2
* cpu/intel: Remove Core 2 Duo E8200 CPUID from model_6fxAngel Pons2020-08-112-2/+1
* cpu/intel/common: Add `intel_ht_supported` functionAngel Pons2020-08-062-3/+14
* cpu/intel/haswell: add Crystal Well CPU IDsIru Cai2020-08-031-0/+2
* cpu/intel/common/fsb.c: add Crystal Well supportIru Cai2020-08-031-0/+1
* cpu/intel/car/romstage.c: Remove unused <bootblock_common.h>Elyes HAOUAS2020-07-261-1/+0
* src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth2020-07-261-1/+1
* cpu,soc/intel: Drop select SMPKyösti Mälkki2020-07-2610-10/+0
* cpu/intel/model_206ax: Clean up includesElyes HAOUAS2020-07-262-2/+2
* src: Remove unused 'include <cpu/intel/common/common.h>Elyes HAOUAS2020-07-264-4/+1
* cpu/intel/model_1067x: Drop <cpu/x86/mp.h> includeElyes HAOUAS2020-07-141-1/+0
* src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS2020-07-141-1/+0
* src: Remove unused 'include <types.h>'Elyes HAOUAS2020-07-141-1/+0
* cpu/intel/haswell/finalize.c: Drop dead codeAngel Pons2020-07-101-37/+0
* cpu/intel/model_2065x/model_2065x_init.c: Drop dead codeAngel Pons2020-07-091-26/+0
* cpu/intel/model_206ax/finalize.c: Drop dead codeAngel Pons2020-07-091-18/+0
* haswell: relocate `romstage_common` to northbridgeAngel Pons2020-07-083-92/+0
* nb/intel/haswell: Drop unnecessary variableAngel Pons2020-07-081-6/+3
* haswell: drop unused function parameterAngel Pons2020-07-081-1/+1
* cpu/x86/lapic: Support x86_64 and clean up codePatrick Rudolph2020-06-221-1/+1
* sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki2020-06-164-4/+4
* gm45 boards: Factor out MAX_CPUSAngel Pons2020-06-152-0/+8
* pineview boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* haswell boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* arrandale boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* sandybridge boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* cpu/intel: Remove obsolete comment in CAR setupKyösti Mälkki2020-06-153-12/+0
* arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki2020-06-154-4/+0
* cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki2020-06-134-62/+50
* src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS2020-06-062-2/+0
* cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>'Elyes HAOUAS2020-06-061-1/+0
* src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS2020-06-061-1/+0
* cpu/intel/slot_1: Select 16KiB bootblock if console is enabledKeith Hui2020-06-041-0/+1
* src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS2020-06-022-2/+0
* arch/x86: Remove more romcc leftoversKyösti Mälkki2020-05-281-1/+1
* cpu/intel/common: Fix typo in commentElyes HAOUAS2020-05-281-1/+1
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-2/+0
* src: Remove unused '#include <stdint.h>'Elyes HAOUAS2020-05-134-4/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1166-66/+0
* src/cpu: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-105-60/+5
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-091-9/+1
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-062-22/+2
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-062-4/+2
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-028-12/+12
* src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS2020-05-013-3/+0
* device: Constify struct device * parameter to acpi_fill_ssdt()Furquan Shaikh2020-04-284-4/+4
* src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0458-721/+116
* acpi: Change Processor ACPI Name (Intel only)Christian Walter2020-03-236-16/+16
* cpu/intel/model_2065x: Add missing CPU IDsAngel Pons2020-03-151-2/+6
* treewide: Replace uses of "Nehalem"Angel Pons2020-03-153-3/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 00:20:37 +0000