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* Remove CACHE_ROM.Vladimir Serbinenko2014-02-252-18/+0
* intel/model_2065x: Fix APICID generation.Vladimir Serbinenko2014-02-201-5/+2
* haswell: backup the default SMM region on resumeAaron Durbin2014-02-162-0/+9
* coreboot: infrastructure for different ramstage loadersAaron Durbin2014-02-151-2/+0
* PCI: Drop includes under cpuKyösti Mälkki2014-02-1224-24/+0
* usbdebug: Drop obsolete codeKyösti Mälkki2014-02-061-16/+0
* cpu/intel/model_2065x: Add model 20652Vladimir Serbinenko2014-02-011-0/+1
* cpu/intel: allow non-packaged scoped turbo settingAaron Durbin2014-01-303-2/+32
* coreboot: config to cache ramstage outside CBMEMAaron Durbin2014-01-302-72/+10
* vboot: provide empty vboot_verify_firmware()Aaron Durbin2014-01-301-2/+0
* intel: fix microcode compilation failure in bootblockAaron Durbin2014-01-281-10/+8
* src/cpu: Fix spelling of MTTR to MTRRPaul Menzel2014-01-263-24/+24
* intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH.Vladimir Serbinenko2014-01-233-11/+0
* cpu/intel: Remove dummy terminators from microcode blobsAlexandru Gagniuc2014-01-1620-138/+0
* cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc2014-01-1672-434/+390
* nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flashKyösti Mälkki2014-01-153-4/+3
* Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki2014-01-156-12/+12
* intel/fsp: Fix microcode includingPatrick Georgi2014-01-111-2/+0
* haswell: Update microcode revisionDuncan Laurie2013-12-214-1153/+2370
* cpu/intel: Do not rely on CBFS microcode having a terminatorAlexandru Gagniuc2013-12-171-16/+31
* cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFSAlexandru Gagniuc2013-12-136-11/+11
* haswell: Export functions for CPU family+model and steppingDuncan Laurie2013-12-122-7/+34
* haswell: Update ULT microcode to rev 14hDuncan Laurie2013-12-123-1089/+1153
* haswell: VR controller configurationAaron Durbin2013-12-072-0/+55
* haswell: Misc power management setup and fixesDuncan Laurie2013-12-072-2/+12
* cpu: Remove BOARD_MICROCODE_CBFS_GENERATE Kconfig optionAlexandru Gagniuc2013-12-051-1/+0
* Add the Intel FSP 206ax CPU core supportMarc Jones2013-12-0414-0/+1609
* slippy/falco/peppy: Fix SPD GPIO initialization.Aaron Durbin2013-12-012-0/+4
* haswell: check for clean resetAaron Durbin2013-11-251-0/+18
* haswell: Update ULT microcode to 0x10Duncan Laurie2013-11-243-961/+1089
* haswell: Remove limit on package C-stateDuncan Laurie2013-11-241-4/+1
* haswell: split microcode between ULT and non-ULTAaron Durbin2013-11-241-2/+5
* haswell: Update ULT microcode to rev 'a'Duncan Laurie2013-11-243-961/+961
* haswell: Configure PCH power sharing for ULTDuncan Laurie2013-11-242-1/+70
* haswell: calibrate 24MHz clock against BCLKAaron Durbin2013-11-242-0/+79
* haswell: configure c-statesAaron Durbin2013-11-242-107/+156
* haswell: Put each logical processor in its own P-state domainDuncan Laurie2013-11-241-2/+2
* haswell: Update microcode for ULT/40651 to rev 8Duncan Laurie2013-11-243-961/+961
* Rename SANDYBRIDGE_BCLK to NEHALEM_BCLK in 2065x.Vladimir Serbinenko2013-11-234-6/+6
* Remove MRC variables from 2065x CAR init.Vladimir Serbinenko2013-11-231-42/+22
* Fix error message on wrong compiles of 2065xVladimir Serbinenko2013-11-211-1/+1
* intel/2065x: Use TSC for udelay()Vladimir Serbinenko2013-11-133-1/+39
* CBMEM: Always select CAR_MIGRATIONKyösti Mälkki2013-09-212-2/+0
* timestamps: Stash early timestamps in CAR_GLOBALKyösti Mälkki2013-09-211-22/+7
* timestamps intel: Move timestamp scratchpad to chipsetKyösti Mälkki2013-09-211-4/+1
* cpu/intel/model_67x: Add missing includeKyösti Mälkki2013-07-301-0/+1
* cpu: Fix spellingMartin Roth2013-07-117-18/+18
* usbdebug: Drop old includesKyösti Mälkki2013-07-118-8/+0
* usbdebug: Put ehci_debug_info in CAR_GLOBALKyösti Mälkki2013-07-105-37/+0
* ec: Add romstage function for checking and rebooting ECDuncan Laurie2013-07-101-0/+8
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