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* cpu/intel/haswell: add Crystal Well CPU IDsIru Cai2020-08-031-0/+2
* cpu/intel/common/fsb.c: add Crystal Well supportIru Cai2020-08-031-0/+1
* cpu/intel/car/romstage.c: Remove unused <bootblock_common.h>Elyes HAOUAS2020-07-261-1/+0
* src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth2020-07-261-1/+1
* arch/x86: Move cpu_relax()Kyösti Mälkki2020-07-261-2/+1
* cpu,soc/intel: Drop select SMPKyösti Mälkki2020-07-2610-10/+0
* cpu/intel/model_206ax: Clean up includesElyes HAOUAS2020-07-262-2/+2
* src: Remove unused 'include <cpu/intel/common/common.h>Elyes HAOUAS2020-07-264-4/+1
* cpu/intel/model_1067x: Drop <cpu/x86/mp.h> includeElyes HAOUAS2020-07-141-1/+0
* src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS2020-07-142-2/+0
* src: Remove unused 'include <types.h>'Elyes HAOUAS2020-07-141-1/+0
* arch/x86: Drop CBMEM_TOP_BACKUPKyösti Mälkki2020-07-111-1/+1
* cpu/intel/haswell/finalize.c: Drop dead codeAngel Pons2020-07-101-37/+0
* cpu/intel/model_2065x/model_2065x_init.c: Drop dead codeAngel Pons2020-07-091-26/+0
* cpu/intel/model_206ax/finalize.c: Drop dead codeAngel Pons2020-07-091-18/+0
* haswell: relocate `romstage_common` to northbridgeAngel Pons2020-07-083-92/+0
* nb/intel/haswell: Drop unnecessary variableAngel Pons2020-07-081-6/+3
* haswell: drop unused function parameterAngel Pons2020-07-081-1/+1
* ACPI: Add and fill gnvs_ptr for smm_runtimeKyösti Mälkki2020-07-082-0/+4
* cpu/x86/smm: Add support for long modePatrick Rudolph2020-07-082-1/+129
* ACPI GNVS: Replace uses of smm_get_gnvs()Kyösti Mälkki2020-07-011-0/+2
* ACPI: Replace smm_setup_structures()Kyösti Mälkki2020-06-243-1/+36
* src/*: Update makefiles to exclude x86 code from psp-verstageMartin Roth2020-06-234-5/+5
* cpu/x86/lapic: Support x86_64 and clean up codePatrick Rudolph2020-06-223-6/+6
* cpu/x86/smm: Add helper functions to verify SMM accessPatrick Rudolph2020-06-172-1/+18
* Revert "x86/lapic: Set EXTINT on BSP only"Angel Pons2020-06-161-11/+15
* x86/lapic: Set EXTINT on BSP onlyZheng Bao2020-06-161-15/+11
* cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki2020-06-161-1/+2
* sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki2020-06-164-4/+4
* arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki2020-06-162-0/+44
* gm45 boards: Factor out MAX_CPUSAngel Pons2020-06-152-0/+8
* pineview boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* haswell boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* arrandale boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* sandybridge boards: Factor out MAX_CPUSAngel Pons2020-06-151-0/+4
* cpu/intel: Remove obsolete comment in CAR setupKyösti Mälkki2020-06-153-12/+0
* arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki2020-06-157-16/+0
* arch/x86: Remove XIP_ROM_SIZEKyösti Mälkki2020-06-151-5/+0
* cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki2020-06-134-62/+50
* treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh2020-06-132-4/+9
* amd/00730F01: Clean the Microcode updatingZheng Bao2020-06-104-157/+116
* src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS2020-06-063-3/+0
* cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>'Elyes HAOUAS2020-06-061-1/+0
* src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS2020-06-061-1/+0
* cpu/intel/slot_1: Select 16KiB bootblock if console is enabledKeith Hui2020-06-041-0/+1
* amd/microcode: Change equivalant ID width to 16bitZheng Bao2020-06-022-3/+3
* cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()Aaron Durbin2020-06-021-3/+15
* cpu/x86/mtrr: add helper for setting multiple MTRRsAaron Durbin2020-06-021-0/+67
* src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS2020-06-024-4/+0
* arch/x86: Remove more romcc leftoversKyösti Mälkki2020-05-282-1/+2
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