coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	src: Remove unused 'include <stdint.h>	Elyes HAOUAS	2020-07-14	1	-1/+0
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	src/drivers: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	1	-12/+2
*	src: Remove unused 'include <arch/cpu.h>'	Elyes HAOUAS	2019-12-19	1	-1/+0
*	AUTHORS: Move src/drivers/[a-i] copyrights into AUTHORS file	Martin Roth	2019-10-22	1	-2/+0
*	{drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support	Frans Hendriks	2019-06-12	1	-8/+0
*	soc/intel/braswell: Use common cpu/intel/car code	Arthur Heymans	2019-06-04	1	-11/+0
*	soc/intel/skylake: Use common cpu/intel/car romstage code	Arthur Heymans	2019-05-29	1	-1/+0
*	soc/intel/fsp1.1: Implement postcar stage	Arthur Heymans	2019-05-21	1	-5/+3
*	driver/intel/fsp1_1: Fix boot failure for non-verstage case	Teo Boon Tiong	2017-01-19	1	-1/+1
*	src/drivers: Capitalize CPU, RAM and ACPI	Elyes HAOUAS	2016-07-31	1	-1/+1
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	fsp1_1: add verstage support	Aaron Durbin	2015-10-14	1	-0/+1
*	intel fsp1_1: prepare for romstage vboot verification split	Aaron Durbin	2015-10-11	1	-0/+52