summaryrefslogtreecommitdiffstats
path: root/src/include/cpu
Commit message (Expand)AuthorAgeFilesLines
* amd/microcode: Change equivalant ID width to 16bitZheng Bao2020-06-021-1/+1
* cpu/x86/mtrr: add x86_setup_mtrrs_with_detect_no_above_4gb()Aaron Durbin2020-06-021-0/+1
* cpu/x86/mtrr: add helper for setting multiple MTRRsAaron Durbin2020-06-021-0/+31
* cpu/x86/mtrr.h: Get rid of commonlib/helpers.h dependencyNico Huber2020-06-021-3/+2
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1119-19/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* cpu: Add a helper function cpu_get_lapic_addrFurquan Shaikh2020-05-021-0/+1
* src/cpu/x86/mtrr/earlymtrr: Add clear_all_var_mtrrRaul E Rangel2020-04-291-0/+1
* cpu/x86/smm.h: Add SW SMI for PSP SMM InfoMarshall Dawson2020-04-131-0/+1
* src/include: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0518-228/+36
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-1711-16/+0
* treewide: Replace uses of "Nehalem"Angel Pons2020-03-151-1/+1
* cpu/x86/smm: Add smm_size to relocatable smmstubArthur Heymans2020-03-071-0/+1
* include/cpu/amd: Drop unused filesElyes HAOUAS2020-03-044-165/+0
* security/intel/stm: Check for processor STM supportEugene Myers2020-02-211-0/+1
* security/intel/stm: Add STM supportEugene Myers2020-02-052-0/+13
* src: Use '#include <smp/node.h>' when appropriateElyes HAOUAS2019-12-191-1/+0
* Drop ROMCC code and header guardsArthur Heymans2019-12-196-45/+4
* Revert "include/cpu/x86: Add STM Support"Aaron Durbin2019-12-182-9/+0
* include/cpu/x86: Add STM SupportEugene D. Myers2019-12-182-0/+9
* AGESA,binaryPI: Add compatibility wrapper for romstage entryKyösti Mälkki2019-11-301-9/+0
* AGESA,binaryPI: Fix stack location on entry to romstageMichał Żygowski2019-11-301-0/+1
* AGESA,binaryPI: Split romstage_main() to BSP and AP partsKyösti Mälkki2019-11-301-1/+1
* binaryPI: Clean leftover romstage prototypeKyösti Mälkki2019-11-301-2/+0
* AGESA,binaryPI: Remove early_all_cores()Kyösti Mälkki2019-11-271-2/+0
* binaryPI: Drop BINARYPI_LEGACY_WRAPPER supportKyösti Mälkki2019-11-271-1/+0
* amdfam10: Clean leftover prototypesKyösti Mälkki2019-11-271-4/+0
* cpu/intel/smm: Drop em64t save stateArthur Heymans2019-11-222-105/+2
* intel/smm: Provide common smm_relocation_paramsKyösti Mälkki2019-11-221-0/+54
* arch/x86: Drop some __SMM__ guardsKyösti Mälkki2019-11-081-2/+0
* cpu/intel/em64t101: Add Nehalem to compatibility listArthur Heymans2019-11-041-0/+1
* cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki2019-11-031-0/+5
* cpu/x86: make set_msr_bit publicly availableMichael Niewöhner2019-10-311-0/+20
* cpu/intel/common: Move intel_ht_sibling() to common folderPatrick Rudolph2019-10-011-1/+0
* cpu,device/: Remove some __SIMPLE_DEVICE__ and __ROMCC__ useKyösti Mälkki2019-09-281-4/+5
* cpu/x86/lapic: Refactor timer_fsb()Kyösti Mälkki2019-09-191-9/+1
* arch/x86: Replace some __PRE_RAM__ useKyösti Mälkki2019-09-143-7/+1
* cpu/x86: Drop lapic_remote_read()Kyösti Mälkki2019-09-141-24/+0
* intel/smm/gen1: Use smm_subregion()Kyösti Mälkki2019-08-281-2/+0
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-14/+0
* amdfam10: Remove use of __PRE_RAM__Kyösti Mälkki2019-08-261-4/+2
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-1/+1
* device/oprom: Drop unnecessary AMD headersKyösti Mälkki2019-08-202-1160/+0
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-1/+1
* intel/smm: Define struct ied_header just onceKyösti Mälkki2019-08-151-0/+6
* soc/intel: Rename some SMM support functionsKyösti Mälkki2019-08-151-3/+6
* intel/smm/gen1: Rename header fileKyösti Mälkki2019-08-151-0/+38
* soc/*: mp_run_on_all_cpus: Remove configurable timeoutPatrick Rudolph2019-08-151-1/+1
* cpu/x86/smm: Promote smm_memory_map()Kyösti Mälkki2019-08-151-0/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-08 10:17:55 +0000