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* cpu/intel/microcode: Fix typo in function parameterElyes HAOUAS2021-02-111-1/+1
* cpu/intel/microcode: Add caching layer in intel_microcode_findPatrick Rudolph2021-01-281-1/+3
* cpu/x86/smm: Remove unused APMC for C-state and P-stateKyösti Mälkki2021-01-261-2/+0
* cpu/x86/smm: Use common APMC loggingKyösti Mälkki2021-01-251-0/+1
* soc/amd/picasso: Generate ACPI CRAT objects in cbJason Glenesk2021-01-151-1/+108
* cpu/intel: add PC10 residency counter MSRMichael Niewöhner2021-01-071-0/+2
* ACPI: Final APM_CNT_GNVS_UPDATE cleanupKyösti Mälkki2021-01-041-2/+1
* soc/amd/picasso: Separate CPUID defs into new headerJason Glenesk2021-01-022-5/+17
* cpu/x86/smm_module_loaderv2: Fix compiling for x86_64Arthur Heymans2020-12-041-4/+4
* cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registersArthur Heymans2020-11-101-3/+4
* soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declarationArthur Heymans2020-11-091-0/+3
* cpu/x86/smm: Add a common save state handlingArthur Heymans2020-11-091-0/+34
* cpu/x86/lapic: rename virtual wire mode initialization functionFelix Held2020-10-311-2/+2
* cpu/intel/common: correct MSR for the Nominal Performance in CPPCMichael Niewöhner2020-10-311-0/+2
* cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner2020-10-242-1/+3
* {cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner2020-10-241-0/+2
* {cpu,soc}/intel: replace AES-NI locking by common implemenation callMichael Niewöhner2020-10-211-0/+1
* cpu/intel/common: rework AES-NI lockingMichael Niewöhner2020-10-191-1/+1
* soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu codeMichael Niewöhner2020-10-191-0/+11
* include/cpu/x86: introduce new helper for (un)setting MSRsMichael Niewöhner2020-10-161-13/+36
* cpu/x86/smm/smmhandler.c: Get revision using C codeArthur Heymans2020-09-291-1/+1
* include/cpu/x86/tsc: Fix rdtsc on x86_64Patrick Rudolph2020-09-281-10/+4
* soc/amd/picasso: Generate ACPI pstate and cstate objects in cbJason Glenesk2020-09-251-3/+13
* cpu/x86/smm.h: Add function to return the SMM save state revisionArthur Heymans2020-09-211-0/+5
* src/include: Drop unneeded empty linesElyes HAOUAS2020-09-147-9/+0
* soc/intel/common/cpu: Update COS mask calculation for NEM enhanced modeAamir Bohra2020-09-141-0/+3
* cpu/x86: Add definition for SMRR_PHYS_MASK_LOCKTim Wawrzynczak2020-09-081-0/+1
* cpu/x86/smm/smm_stub: Add x86_64 supportPatrick Rudolph2020-08-181-1/+1
* arch/x86/exit_car.S: Make sure _cbmem_top_ptr hits dramArthur Heymans2020-08-171-0/+2
* cpu/x86/smm: Introduce SMM module loader version 2Rocky Phagura2020-08-151-0/+18
* src/include: Add missing includesElyes HAOUAS2020-07-266-0/+9
* include/cpu/amd/msr: move SMM_LOCK bit right after HWCR_MSR definitionFelix Held2020-07-091-1/+1
* ACPI: Add and fill gnvs_ptr for smm_runtimeKyösti Mälkki2020-07-081-0/+1
* include/cpu/x86/lapic: Add support for x86_64Patrick Rudolph2020-07-051-2/+2
* ACPI GNVS: Replace uses of smm_get_gnvs()Kyösti Mälkki2020-07-011-1/+3
* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-301-0/+1
* ACPI: Replace smm_setup_structures()Kyösti Mälkki2020-06-241-2/+0
* cpu/x86/lapic: Support x86_64 and clean up codePatrick Rudolph2020-06-221-51/+14
* soc/amd/picasso/bootblock: Write EIP to secure S3Raul E Rangel2020-06-221-0/+1
* cpu/x86/smm: Define APM_CNT_ROUTE_ALL_XHCIKyösti Mälkki2020-06-221-0/+1
* cpu/x86/smm: Define APM_CNT_NOOP_SMIKyösti Mälkki2020-06-221-0/+1
* cpu/x86/smm: Add helper functions to verify SMM accessPatrick Rudolph2020-06-171-0/+12
* cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki2020-06-161-0/+1
* sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki2020-06-161-1/+0
* soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki2020-06-161-1/+0
* arch/x86: Declare global_smi_enable()Kyösti Mälkki2020-06-161-0/+3
* arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki2020-06-161-0/+3
* arch/x86: Remove XIP_ROM_SIZEKyösti Mälkki2020-06-151-4/+0
* amd/00730F01: Clean the Microcode updatingZheng Bao2020-06-101-2/+1
* amd/common: Add the macro definition for patch level MSRZheng Bao2020-06-101-0/+1
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