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* lib/coreboot_table: Add Intel FSP version to coreboot tableJohnny Lin2020-07-041-0/+7
* lib/hardwaremain: Drop HAVE_ACPI_RESUME guardsKyösti Mälkki2020-06-181-13/+10
* lib/reg_script: Add guards for <arch/io.h>Kyösti Mälkki2020-06-171-1/+13
* treewide: Replace CONFIG(ARCH_xx) testsKyösti Mälkki2020-06-177-12/+16
* lib/malloc: Drop <cpu/x86/smm.h> includeKyösti Mälkki2020-06-161-1/+0
* lib/program.ld: Replace CONFIG(ARCH_xx) testsKyösti Mälkki2020-06-101-4/+1
* fw_config: Add firmware configuration interfaceDuncan Laurie2020-06-022-0/+99
* src: Remove unused 'include <bootstate.h>'Elyes HAOUAS2020-06-023-3/+0
* fit: Swap compat matching priorities for board-revX and board-skuYJulius Werner2020-05-291-6/+6
* drivers/intel/fsp2_0: add option to compress FSP-M in cbfsAaron Durbin2020-05-281-0/+12
* drivers/intel/fsp2_0: add option to compress FSP-S in cbfsAaron Durbin2020-05-281-0/+13
* lib/cbfs: add cbfs_stage_load_and_decompress helperAaron Durbin2020-05-281-9/+40
* lib: Add strtok() and strtok_r()harshit2020-05-281-0/+25
* arch/x86: Remove more romcc leftoversKyösti Mälkki2020-05-281-6/+0
* lib/cbfs: refactor code culling compression checksAaron Durbin2020-05-281-9/+23
* Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTIONKyösti Mälkki2020-05-263-3/+3
* Remove new additions of "this file is part of" linesElyes HAOUAS2020-05-181-1/+0
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-182-6/+0
* lib/spd_cache: add spd_cache common codeJamie Chen2020-05-132-0/+223
* src: Remove unused '#include <stddef.h>'Elyes HAOUAS2020-05-131-1/+0
* espi_debug: Use switch case instead of if-elseFurquan Shaikh2020-05-131-27/+51
* Remove new additions of "this file is part of" linesFurquan Shaikh2020-05-131-1/+0
* espi: Add support for debug helper to print slave capabilitiesFurquan Shaikh2020-05-123-0/+105
* treewide: Convert more license headers to SPDX stylePatrick Georgi2020-05-114-63/+4
* treewide: split off license text, remove extra copyright noticesPatrick Georgi2020-05-113-10/+2
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1151-51/+0
* src: Replace remaining GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-101-12/+1
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-092-18/+3
* memrange: Break early from memranges_find_entry if limit is crossedFurquan Shaikh2020-05-081-1/+6
* lib/rtc.c: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-081-11/+2
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-065-54/+5
* treewide: move copyrights and authors to AUTHORSPatrick Georgi2020-05-065-19/+3
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-023-3/+3
* rules.h: Rename ENV_VERSTAGE to ENV_SEPARATE_VERSTAGEJulius Werner2020-04-231-4/+4
* drivers/pc80/rtc: Reorganize prototypesKyösti Mälkki2020-04-201-1/+1
* src/lib: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0447-613/+94
* security/tpm: Include mrc.bin in CRTM if presentBill XIE2020-03-311-3/+10
* security/vboot: Decouple measured boot from verified bootBill XIE2020-03-311-7/+7
* memranges: Change align attribute to be log2 of required alignmentFurquan Shaikh2020-03-301-19/+10
* src/device: Add option to look at revision in option romsMartin Roth2020-03-251-0/+17
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-1749-61/+0
* memrange: Add support for stealing required memory from given rangesFurquan Shaikh2020-03-171-0/+55
* memrange: Enable memranges to support different alignmentsFurquan Shaikh2020-03-171-9/+17
* lib/spd_bin: Add spaces around operatorPaul Menzel2020-03-151-1/+1
* lib/spd_bin: Cleanup spd_get_banksEric Lai2020-03-151-13/+6
* lib/spd_bin: Add LPDDR4X SPD information and DDR5, LPDDR5 IDsEric Lai2020-03-151-1/+8
* prog_loaders: Remove CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADINGJulius Werner2020-03-111-6/+0
* cbfs: Remove unused functionsJulius Werner2020-03-111-30/+0
* lib/spd_bin: Correct LPDDR3 SPD informationEric Lai2020-03-101-12/+26
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