| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | src/mainboard: Replace GPLv2 long form headers with SPDX header | Elyes HAOUAS | 2020-05-10 | 1 | -13/+1 |
| * | mainboard/[a-f]*: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -2/+0 |
| * | mb/foxconn/d41s/devicetree.cb: Indent with tabs | Angel Pons | 2020-01-10 | 1 | -90/+89 |
| * | sb/intel/i82801gx: Add common LPC decode code | Arthur Heymans | 2019-11-12 | 1 | -0/+2 |
| * | sb/intel/i82801gx: Detect if the southbridge supports AHCI | Arthur Heymans | 2019-06-06 | 1 | -1/+0 |
| * | mb/{d41s,d510mo}: Remove references to PCIe port 5 and 6 | Arthur Heymans | 2019-01-08 | 1 | -1/+0 |
| * | mb/foxconn/d41s: Program the subsystemid | Arthur Heymans | 2019-01-03 | 1 | -1/+4 |
| * | mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 | Arthur Heymans | 2018-11-12 | 1 | -4/+4 |
| * | mb/foxconn/d41s: Add mainboard | Arthur Heymans | 2018-08-23 | 1 | -0/+109 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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