| Commit message (Expand) | Author | Age | Files | Lines |
* | mb/x/acpi_tables: Rename to mainboard_fill_gnvs() | Kyösti Mälkki | 2021-01-10 | 1 | -10/+0 |
* | soc/intel/broadwell: Move MAX_CPUS from mb to SoC | Felix Singer | 2021-01-06 | 1 | -4/+0 |
* | soc/intel/skylake: Move MAX_CPUS from mb to SoC | Felix Singer | 2021-01-06 | 1 | -4/+0 |
* | mb/purism/librem_cnl: Fix HDA verb NID count for Librem Mini | Matt DeVillier | 2021-01-04 | 1 | -1/+1 |
* | nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings | Michael Niewöhner | 2021-01-01 | 2 | -17/+17 |
* | soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation | Michael Niewöhner | 2021-01-01 | 1 | -5/+5 |
* | soc/intel/cannonlake: Change mainboard_silicon_init_params argument | Patrick Rudolph | 2020-12-17 | 1 | -1/+1 |
* | mb/purism/librem_cnl: Use FMAP-based SPD cache | Matt DeVillier | 2020-12-16 | 2 | -43/+95 |
* | mb/purism/librem_mini: Adjust PL1/2 levels | Matt DeVillier | 2020-12-15 | 1 | -2/+2 |
* | soc/intel/skylake: Drop always-zero ProbelessTrace dt setting | Angel Pons | 2020-12-14 | 1 | -1/+0 |
* | soc/intel/skylake: Drop unreferenced PttSwitch dt setting | Angel Pons | 2020-12-14 | 1 | -1/+0 |
* | mb/purism/librem_cnl: move setting of FSP-M UPDs into variant.c | Matt DeVillier | 2020-12-14 | 6 | -10/+23 |
* | mb/*: Remove SATA mode config for CNL based mainboards | Felix Singer | 2020-12-08 | 1 | -1/+0 |
* | soc/intel/cannonlake: Align SATA mode names with soc/skl | Felix Singer | 2020-12-08 | 1 | -1/+1 |
* | mb/*: Remove unnecessary selects | Felix Singer | 2020-12-06 | 1 | -1/+0 |
* | soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig | Michael Niewöhner | 2020-11-13 | 1 | -1/+0 |
* | broadwell: Flatten `acpi_init_gnvs` function | Angel Pons | 2020-11-13 | 1 | -1/+0 |
* | broadwell: Factor out `acpi_fill_madt` function | Angel Pons | 2020-11-13 | 1 | -13/+0 |
* | soc/intel/broadwell/acpi: Rename `systemagent.asl` | Angel Pons | 2020-11-13 | 1 | -1/+1 |
* | mb/purism/librem_cnl: Add new variant 'Librem Mini v2' | Matt DeVillier | 2020-11-09 | 2 | -2/+10 |
* | mb/purism/librem_mini: Fix USB_OC mapping in devicetree | Matt DeVillier | 2020-11-09 | 1 | -6/+6 |
* | mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe | Matt DeVillier | 2020-11-09 | 1 | -1/+0 |
* | mb/purism/librem_mini: Update smbios_slot_desc for M.2/WLAN | Matt DeVillier | 2020-11-09 | 1 | -1/+1 |
* | mb/purism/librem_mini: Fix PCIe clock source mapping in devicetree | Matt DeVillier | 2020-11-09 | 1 | -16/+6 |
* | mb/purism/librem_mini: Adjust GPIO pad config per schematics | Matt DeVillier | 2020-11-09 | 1 | -13/+13 |
* | mb/purism/librem_mini: Set unused GPIO pads to PAD_NC | Matt DeVillier | 2020-11-06 | 1 | -280/+280 |
* | mb/purism/librem_mini: Drop DW0/DW1 from GPIO config comments | Matt DeVillier | 2020-11-05 | 1 | -188/+0 |
* | mb/purism/librem_cnl: Set SaGv to FixedHigh | Angel Pons | 2020-11-04 | 1 | -1/+1 |
* | mb/purism/librem_mini: Drop community comments in GPIO config | Matt DeVillier | 2020-11-04 | 1 | -8/+0 |
* | mb/purism/librem_mini: Update GPIO config | Matt DeVillier | 2020-11-04 | 1 | -60/+60 |
* | mb/purism_librem_mini: Add child device, slot descriptions to PCIe RPs | Matt DeVillier | 2020-11-04 | 1 | -3/+10 |
* | mb/purism/librem_mini: Reorganize devicetree | Matt DeVillier | 2020-11-04 | 1 | -38/+27 |
* | mb/purism/librem_mini: drop unused HeciEnabled register | Matt DeVillier | 2020-11-04 | 1 | -4/+1 |
* | mb/purism/librem_mini: Increase TDP/PL2 setting | Matt DeVillier | 2020-11-04 | 1 | -1/+1 |
* | mb/purism/librem_mini: Drop devicetree settings which default to 0 | Matt DeVillier | 2020-11-04 | 1 | -47/+0 |
* | mb/purism/librem_mini: drop SendVrMbxCmd from devicetree | Matt DeVillier | 2020-11-04 | 1 | -3/+0 |
* | soc/intel/broadwell: Relocate PCH ACPI files | Angel Pons | 2020-11-03 | 1 | -2/+2 |
* | mb/purism/librem_cnl: Adjust in preparation for new variants | Matt DeVillier | 2020-11-03 | 5 | -5/+17 |
* | mb/purism/librem_whl: rename to librem_cnl | Matt DeVillier | 2020-11-03 | 13 | -5/+5 |
* | soc/intel/broadwell: Separate PCH in devicetree | Angel Pons | 2020-10-30 | 3 | -6/+6 |
* | mb/purism/librem_bdw: Prepare devicetree for PCH split | Angel Pons | 2020-10-30 | 3 | -48/+55 |
* | mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` | Michael Niewöhner | 2020-10-26 | 2 | -6/+0 |
* | soc/intel,mb/*: get rid of legacy pad macros | Michael Niewöhner | 2020-10-21 | 1 | -85/+85 |
* | mb/purism/librem_skl: Clean up FSP-M RCOMP settings | Angel Pons | 2020-10-19 | 1 | -17/+10 |
* | mb/purism/librem_skl: Drop DQ and DQS byte maps | Angel Pons | 2020-10-14 | 1 | -26/+0 |
* | {src/mb,util/autoport}: Use macro for DSDT revision | Elyes HAOUAS | 2020-10-13 | 3 | -3/+3 |
* | soc/intel/common/block/acpi: Factor out common platform.asl | Subrata Banik | 2020-10-05 | 2 | -2/+2 |
* | mb/purism/librem_whl: Drop 3Gbps SATA limit; enable and set SATA tuning params | Matt DeVillier | 2020-09-28 | 2 | -4/+8 |
* | mb/purism/librem_skl: Enable and set SATA tuning params | Matt DeVillier | 2020-09-28 | 1 | -0/+6 |
* | soc/intel/broadwell: Drop `gpu_panel_port_select` | Angel Pons | 2020-09-08 | 1 | -2/+1 |