coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	gm45: Don't crash if less than 4G of RAM are present.	Vladimir Serbinenko	2014-11-12	1	-1/+1
*	northbridge/intel: Use DEVICE_NOOP macro over dummy symbol	Edward O'Callaghan	2014-11-01	1	-7/+3
*	gm45: Convert to per-device ACPI	Vladimir Serbinenko	2014-10-15	1	-0/+2
*	gm45: Declare BIOS memory as RAM.	Vladimir Serbinenko	2014-08-17	1	-4/+2
*	gm45: Decrease MTRR usage	Vladimir Serbinenko	2014-08-16	1	-3/+7
*	gm45: Set acpi_slp_type only once.	Vladimir Serbinenko	2014-08-14	1	-17/+16
*	gm45: Move S3 detection to enable stage.	Vladimir Serbinenko	2014-08-12	1	-0/+18
*	northbridge/intel: Drop use of set_top_of_ram()	Kyösti Mälkki	2014-06-18	1	-2/+0
*	CBMEM northbridges: Remove references to global high_tables_base	Kyösti Mälkki	2013-09-11	1	-3/+1
*	Fix MMCONF_SUPPORT_DEFAULT for ramstage	Kyösti Mälkki	2013-07-10	1	-5/+1
*	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel	2013-03-01	1	-1/+1
*	Drop CONFIG_WRITE_HIGH_TABLES	Stefan Reinauer	2013-02-28	1	-2/+0
*	sconfig: rename lapic_cluster -> cpu_cluster	Stefan Reinauer	2013-02-14	1	-1/+1
*	sconfig: rename pci_domain -> domain	Stefan Reinauer	2013-02-14	1	-1/+1
*	Remove assembly coded log2 function	Ronald G. Minnich	2012-11-28	1	-1/+0
*	intel/gm45: new northbridge	Patrick Georgi	2012-11-27	1	-0/+285