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path: root/src/northbridge/intel/gm45/northbridge.c
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* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-021-1/+1
* Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber2020-04-101-2/+2
* Drop unnecessary DEVICE_NOOP entriesNico Huber2020-04-101-1/+0
* src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-051-13/+2
* Drop explicit NULL initializations from `device_operations`Elyes HAOUAS2020-04-051-2/+0
* Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber2020-04-021-1/+1
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-1/+0
* northbridge: Remove unused include <device/pci.h>Elyes HAOUAS2020-03-061-1/+0
* northbridge: Add missing include <device/pci_def.h>Elyes HAOUAS2019-12-311-0/+1
* src/northbridge: Remove unused <stdlib.h>Elyes HAOUAS2019-12-191-1/+0
* src: Remove unused '#include <cpu/cpu.h>'Elyes HAOUAS2019-10-281-1/+0
* intel/smm/gen1: Rename header fileKyösti Mälkki2019-08-151-1/+1
* cpu/intel: Replace bsp_init_and_start_aps()Kyösti Mälkki2019-08-151-7/+1
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+1
* src: Drop unused include <arch/acpi.h>Elyes HAOUAS2019-03-061-1/+0
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* nb/intel/gm45: Use parallel MP initArthur Heymans2019-01-231-21/+1
* device: Use pcidev_on_root()Kyösti Mälkki2019-01-061-5/+5
* device: Replace ugly cases of dev_find_slot()Kyösti Mälkki2019-01-041-1/+1
* northbridge: Remove useless include <device/pci_ids.h>Elyes HAOUAS2018-12-191-1/+0
* nb/intel/gm45: Correctly cache TSEGArthur Heymans2018-12-031-16/+0
* nb/intel/gm45/northbridge.c: Check for NULL pointersArthur Heymans2018-11-251-3/+12
* src: Get rid of duplicated includesElyes HAOUAS2018-11-161-1/+0
* nb/intel/*: Account for cbmem_top alignmentArthur Heymans2018-10-241-1/+11
* nb/intel/gm45: Don't use PCI operations on the pci_domain deviceArthur Heymans2018-08-011-7/+11
* nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans2018-07-301-0/+38
* sb/intel/i82801ix: Use the common ACPI pirq generatorArthur Heymans2018-06-291-0/+17
* {mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber2018-05-081-1/+0
* nb/intel/gm45: Get rid of device_tElyes HAOUAS2018-04-301-6/+6
* nb/intel/gm45: Allocate a 8M TSEG regionArthur Heymans2018-03-281-2/+7
* nb/intel/gm45: Remove UMA alignment optimizationNico Huber2017-10-031-7/+3
* nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans2017-01-061-1/+0
* intel/gm45: Use romstage_handoff for S3Kyösti Mälkki2016-12-111-17/+0
* northbridge/intel/gm45: Add space around operatorsElyes HAOUAS2016-09-201-3/+3
* Revert "northbridge/intel/peg: Disable unused ports"Nico Huber2016-02-091-13/+1
* northbridge/intel/peg: Disable unused portsPatrick Rudolph2016-02-041-1/+13
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* gm45: Don't crash if less than 4G of RAM are present.Vladimir Serbinenko2014-11-121-1/+1
* northbridge/intel: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan2014-11-011-7/+3
* gm45: Convert to per-device ACPIVladimir Serbinenko2014-10-151-0/+2
* gm45: Declare BIOS memory as RAM.Vladimir Serbinenko2014-08-171-4/+2
* gm45: Decrease MTRR usageVladimir Serbinenko2014-08-161-3/+7
* gm45: Set acpi_slp_type only once.Vladimir Serbinenko2014-08-141-17/+16
* gm45: Move S3 detection to enable stage.Vladimir Serbinenko2014-08-121-0/+18
* northbridge/intel: Drop use of set_top_of_ram()Kyösti Mälkki2014-06-181-2/+0
* CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki2013-09-111-3/+1
* Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki2013-07-101-5/+1
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