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path:
root
/
src
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northbridge
/
intel
/
haswell
/
pcie.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
device/device.h: Rename busses for clarity
Arthur Heymans
2024-01-31
1
-5
/
+5
*
nb/intel/haswell/pcie.c: Make UBSAN not complain
Angel Pons
2023-03-21
1
-2
/
+2
*
src: Make PCI ID define names shorter
Felix Singer
2022-03-07
1
-1
/
+1
*
nb/intel/haswell/pcie.c: Avoid needless death
Angel Pons
2021-06-22
1
-5
/
+18
*
nb/intel/haswell/pcie.c: Introduce helper variable
Angel Pons
2021-06-22
1
-4
/
+6
*
nb/intel/haswell/pcie.c: Fix getting PCI function
Angel Pons
2021-06-22
1
-1
/
+1
*
nb/intel/haswell/pcie.c: Add missing pre-ASPM init
Angel Pons
2021-03-10
1
-0
/
+94
*
nb/intel/haswell/pcie.c: remove disable NOP
Arthur Heymans
2021-02-24
1
-7
/
+0
*
nb/intel/haswell: Add Crystal Well PCI IDs
Iru Cai
2020-08-03
1
-1
/
+4
*
src: Use pci_dev_ops_pci where applicable
Angel Pons
2020-06-06
1
-5
/
+1
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
src/northbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-05
1
-14
/
+2
*
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-17
1
-1
/
+0
*
nb/intel/haswell/peg: Add PEG driver stub
Chris Morgan
2020-03-06
1
-0
/
+88