coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	sb/intel/bd82x6x: assign EHCI controller ops in chipset devicetree	Felix Held	2023-12-06	1	-2/+2
*	sb/intel/bd82x6x: assign PCH XHCI controller ops in chipset devicetree	Felix Held	2023-12-06	1	-1/+1
*	sb/intel/bd82x6x: assign PCH PCI bridge ops in chipset devicetree	Felix Held	2023-12-06	1	-1/+1
*	sb/intel/bd82x6x: assign PCH SMBus controller ops in chipset devicetree	Felix Held	2023-12-06	1	-1/+1
*	sb/intel/bd82x6x: assign PCH LPC bridge ops in chipset devicetree	Felix Held	2023-12-05	1	-1/+1
*	sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetree	Felix Held	2023-11-18	1	-1/+1
*	sb/intel/bd82x6x: assign PCIe root port ops in chipset devicetree	Felix Held	2023-11-18	1	-8/+8
*	nb/intel/sandybridge: assign gma ops in chipset devicetree	Felix Held	2023-11-18	1	-1/+1
*	nb/intel/sandybridge: assign host bridge ops in chipset devicetree	Felix Held	2023-11-18	1	-1/+1
*	mb/*: Replace SNB PCI devices with references from chipset.cb	Arthur Heymans	2023-02-04	1	-0/+33
*	cpu/intel/model_206ax: Remove fake lapic device	Arthur Heymans	2022-12-01	1	-11/+5
*	cpu/intel/sandybridge: Use enum for ACPI C states	Arthur Heymans	2022-12-01	1	-3/+3
*	nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree	Arthur Heymans	2022-11-30	1	-0/+2
*	nb/intel/sandybridge: Add a chipset devicetree	Arthur Heymans	2022-11-30	1	-0/+18