coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	cbmem_top_chipset: Change the return value to uintptr_t	Elyes Haouas	2022-11-18	1	-2/+2
*	nb/intel/sandybridge: Add support for DPR	Michał Żygowski	2021-11-26	1	-4/+31
*	nb/intel/sandybridge: Improve cbmem_top_chipset calculation	Angel Pons	2020-10-13	1	-11/+9
*	nb/intel/sandybridge: Add missing includes	Elyes HAOUAS	2020-07-26	1	-0/+2
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	nb/intel/sandybridge: Use SPDX headers	Angel Pons	2020-03-25	1	-13/+2
*	nb/intel/sandybridge: Tidy up code and comments	Angel Pons	2020-03-18	1	-13/+15
*	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi	2020-03-17	1	-1/+0
*	src: capitalize 'RAM'	Elyes HAOUAS	2020-02-24	1	-2/+2
*	nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers	Felix Held	2019-12-29	1	-1/+1
*	lib/cbmem_top: Add a common cbmem_top implementation	Arthur Heymans	2019-11-01	1	-1/+1
*	src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'	Elyes HAOUAS	2019-10-21	1	-1/+0
*	intel/smm/gen1: Use smm_subregion()	Kyösti Mälkki	2019-08-28	1	-9/+6
*	soc/intel: Use common romstage code	Kyösti Mälkki	2019-08-26	1	-1/+0
*	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki	2019-08-22	1	-1/+1
*	intel/smm/gen1: Rename header file	Kyösti Mälkki	2019-08-15	1	-1/+1
*	arch/x86: Add postcar_frame_common_mtrrs()	Kyösti Mälkki	2019-08-15	1	-7/+0
*	cpu/intel: Refactor platform_enter_postcar()	Kyösti Mälkki	2019-08-15	1	-15/+5
*	northbridge/intel: Rename ram_calc.c to memmap.c	Kyösti Mälkki	2019-08-07	1	-0/+94