coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/amd/cezanne: Add device tree support for I2C	Raul E Rangel	2021-04-01	1	-0/+8
*	soc/amd/cezanne/chip: add soc_acpi_name	Felix Held	2021-02-18	1	-0/+17
*	soc/amd/cezanne: add partial data fabric setup	Felix Held	2021-02-14	1	-0/+3
*	soc/amd/cezanne/chip: set device operations for UART MMIO devices	Felix Held	2021-02-11	1	-0/+9
*	soc/amd/cezanne: add empty mp_init_cpus	Felix Held	2021-02-11	1	-2/+3
*	soc/amd/cezanne/chip: add empty set_mmio_dev_ops	Felix Held	2021-02-10	1	-0/+7
*	soc/amd/cezanne/chip: add empty cpu_bus_ops	Felix Held	2021-02-10	1	-0/+8
*	soc/amd,intel: Drop s3_resume parameter on FSP-S functions	Kyösti Mälkki	2021-02-09	1	-2/+1
*	soc/amd/cezanne/chip: add PCI bus scanning	Felix Held	2021-02-07	1	-0/+14
*	soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP calls	Felix Held	2021-01-30	1	-1/+2
*	soc/amd/cezanne: add empty ramstage FCH support	Felix Held	2021-01-29	1	-0/+4
*	soc/amd/cezanne/chip: add FSP silicon init driver call	Felix Held	2021-01-29	1	-0/+3
*	soc/amd/cezanne/chip: add empty SoC device operations	Felix Held	2021-01-28	1	-1/+18
*	soc/amd/cezanne: add config.c and minimal chip.h	Felix Held	2020-12-06	1	-0/+1
*	soc/amd/cezanne: add skeleton for new SoC	Felix Held	2020-12-05	1	-0/+5