coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	src/soc/amd: Remove unused <console/console.h>	Elyes HAOUAS	2022-01-10	1	-1/+0
*	soc/amd: make configure_espi_with_mb_hook call conditional	Felix Held	2021-10-15	1	-2/+6
*	soc/amd/common/include/espi: rename configure_espi	Felix Held	2021-10-15	1	-1/+1
*	soc/amd/common/block/espi_util: Refactor eSPI Setup	Karthikeyan Ramasubramanian	2021-10-13	1	-12/+3
*	soc/amd/*: Enable ACPIMMIO decode first in fch_pre_init	Felix Held	2021-10-13	1	-1/+3
*	soc/amd/cezanne/early_fch: move mb_set_up_early_espi into if block	Felix Held	2021-09-27	1	-2/+3
*	soc/amd/common/block/include/i2c: introduce I2C_RESET_SCL_PIN macro	Felix Held	2021-09-09	1	-4/+4
*	soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configuration	Felix Held	2021-09-08	1	-5/+5
*	soc/amd: Show SPI settings in bootblock	Martin Roth	2021-08-30	1	-0/+1
*	soc/amd/cezanne/early_fch: Perform early SPI initialization	Karthikeyan Ramasubramanian	2021-08-30	1	-1/+1
*	soc/amd/cezanne: Add call to mb to configure eSPI requirements	Martin Roth	2021-06-28	1	-0/+1
*	soc/amd/cezanne: Init eSPI early if required	Martin Roth	2021-06-23	1	-1/+8
*	soc/amd/cezanne: Set Power state after power failure	Karthikeyan Ramasubramanian	2021-04-10	1	-1/+3
*	soc/amd: Make espi_clear_decodes private	Raul E Rangel	2021-04-05	1	-3/+1
*	soc/amd: Make espi_configure_decodes private	Raul E Rangel	2021-04-05	1	-1/+0
*	soc/amd/cezanne: Clear eSPI ranges before configuring eSPI	Martin Roth	2021-04-05	1	-0/+1
*	soc/amd: add DISABLE_KEYBOARD_RESET_PIN option	Felix Held	2021-03-29	1	-0/+4
*	soc/amd/cezanne: Implement PROVIDES_ROM_SHARING	Raul E Rangel	2021-03-29	1	-0/+3
*	soc/amd/cezanne: Initialize I2C	Zheng Bao	2021-03-22	1	-0/+1
*	soc/amd/cezanne: Get I2C specific code for cezanne	Zheng Bao	2021-03-22	1	-0/+24
*	soc/amd/cezanne: Disable legacy DMA IO ports	Raul E Rangel	2021-03-02	1	-0/+1
*	soc/amd/cezanne: Add eSPI support	Zheng Bao	2021-02-24	1	-0/+6
*	soc/amd/cezanne: Enable early LPC support in bootblock stage	Zheng Bao	2021-02-09	1	-0/+3
*	soc/amd/cezanne: add AOAC support	Felix Held	2021-01-14	1	-0/+1
*	soc/amd/cezanne: add console UART support	Felix Held	2021-01-14	1	-0/+10
*	soc/amd/cezanne: add basic early FCH initialization to bootblock	Felix Held	2020-12-09	1	-0/+21