coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/amd/stoneyridge: Change code to accommodate Merlin Falcon SOC	Richard Spiegel	2019-07-31	1	-0/+6
*	soc/amd/stoneyridge: Move I2C bus clear out of gpio.c	Marshall Dawson	2019-05-16	1	-1/+1
*	mb/google/kahlee: Tune eDP panel initialization time	Chris Wang	2018-11-09	1	-0/+9
*	amd/stoneyridge: Indicate STAPM units in their name	Richard Spiegel	2018-10-11	1	-2/+2
*	soc/amd/stoneyridge/gpio.c: Create I2C slave reset code	Richard Spiegel	2018-10-10	1	-0/+9
*	mb/google/kahlee/variants/baseboard: Set STAPM percentage	Richard Spiegel	2018-09-17	1	-0/+3
*	soc/amd/stoneyridge: Add I2C devicetree support.	Justin TerAvest	2018-01-25	1	-0/+7
*	amd/stoneyridge: Fix SPD files and functions camel case	Marc Jones	2017-11-20	1	-1/+1
*	soc/amd/stoneyridge: Add UMA settings to devicetree	Aaron Durbin	2017-11-10	1	-0/+16
*	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel	2017-11-10	1	-0/+4
*	amd/stoneyridge: Clarify SPD structure in chip.h	Marshall Dawson	2017-11-03	1	-1/+5
*	soc/amd/stoneyridge: clean up chip.h	Martin Roth	2017-10-17	1	-6/+0
*	soc/amd: Standardize guards on header files	Martin Roth	2017-08-28	1	-3/+3
*	soc/amd/stoneyridge: Fix most checkpatch errors	Marshall Dawson	2017-06-27	1	-2/+1
*	soc/amd/stoneyridge: Add northbridge support	Marc Jones	2017-06-26	1	-1/+4
*	soc: Add AMD Stoney Ridge southbridge code	Marc Jones	2017-06-26	1	-0/+33