summaryrefslogtreecommitdiffstats
path: root/src/soc/amd
Commit message (Expand)AuthorAgeFilesLines
* soc/amd/common/block/pm: remove POWER_STATE_DEFAULT_ON_AFTER_FAILUREFelix Held2021-04-141-3/+0
* soc/amd/common/block/pm: select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILUREFelix Held2021-04-141-0/+1
* Rename do_printk() to printk()Nico Huber2021-04-141-3/+3
* soc/amd/picasso/fch: add missing amdblocks/gpio_banks.h headerFelix Held2021-04-141-0/+1
* soc/amd/cezanne/fch: process ACPI PM/GPE and GPIO eventsFelix Held2021-04-141-0/+6
* soc/amd/cezanne: save chipset state to CBMEMMartin Roth2021-04-142-0/+5
* soc/amd/picasso/romstage: factor out chipset state saving functionalityFelix Held2021-04-146-23/+41
* soc/amd/common/block/gpio: remove SoC type check in gpio_fill_wake_stateFelix Held2021-04-111-4/+0
* soc/amd/cezanne: Set Power state after power failureKarthikeyan Ramasubramanian2021-04-102-1/+4
* soc/amd/common: Handle power resume after power failureKarthikeyan Ramasubramanian2021-04-104-0/+77
* soc/amd/cezanne: Add GRXS and GTXS methodEric Lai2021-04-106-47/+58
* soc/amd: remove special GPIO_2 override soc_gpio_hookKyösti Mälkki2021-04-085-36/+0
* soc/amd/common: Add PM_ESPI_INTR_CTRLRaul E Rangel2021-04-081-0/+2
* soc/amd/picasso/acpi: fix domain argument of acpigen_write_CSD_packageFelix Held2021-04-071-1/+2
* soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSPMatt Papageorge2021-04-072-0/+60
* vc/amd/fsp/cezanne: update UPD headersMatt Papageorge2021-04-072-2/+1
* soc/amd/cezanne: Add soc/msr.hRaul E Rangel2021-04-051-0/+24
* soc/amd/common: Add some ESPI register definitionsMartin Roth2021-04-051-5/+15
* soc/amd: Make espi_clear_decodes privateRaul E Rangel2021-04-053-11/+3
* soc/amd: Make espi_configure_decodes privateRaul E Rangel2021-04-055-18/+15
* soc/amd/common/espi: Clear DNCMD_COMPLETE on completionRaul E Rangel2021-04-051-0/+2
* soc/amd/common/espi: Reset eSPI registers to known stateRaul E Rangel2021-04-051-0/+8
* soc/amd/common/espi: Add missing eSPI register definitionsRaul E Rangel2021-04-051-0/+23
* soc/amd/common/espi: Add ESPI_ prefix to SLAVE0_INT_ENRaul E Rangel2021-04-051-4/+4
* soc/amd/cezanne: Clear eSPI ranges before configuring eSPIMartin Roth2021-04-051-0/+1
* soc/amd/common: Add func to clear eSPI IO & memory decode rangesMartin Roth2021-04-052-0/+28
* soc/amd/cezanne: Add support to perform early EC syncKarthikeyan Ramasubramanian2021-04-021-0/+4
* soc/amd/cezanne: Enable GENERIC_GPIO_LIBRaul E Rangel2021-04-011-0/+1
* soc/amd/cezanne: Add device tree support for I2CRaul E Rangel2021-04-011-0/+8
* soc/amd/common/block/graphics: Don't add VBIOS to cbmem when using GOPRaul E Rangel2021-03-311-1/+5
* soc/amd/picasso/acpi: pass correct enum to acpigen_write_CSD_packageFelix Held2021-03-311-1/+1
* soc/amd/cezanne: Comment the AOAC register accessKarthikeyan Ramasubramanian2021-03-301-6/+12
* soc/amd: smbus: Use correct type for uintptr_tPaul Menzel2021-03-291-2/+2
* soc/amd/cezanne: factor out UPD-M configuration from romstageFelix Held2021-03-293-17/+23
* soc/amd/picasso: factor out UPD-M configuration from romstageFelix Held2021-03-294-117/+122
* soc/amd/cezanne,picasso: rename fsp_params.c to fsp_s_params.cFelix Held2021-03-294-2/+2
* soc/amd: add DISABLE_KEYBOARD_RESET_PIN optionFelix Held2021-03-296-0/+36
* soc/amd/cezanne: Implement PROVIDES_ROM_SHARINGRaul E Rangel2021-03-292-0/+12
* soc/amd/common/block/acpimmio/mmio_util: add fch_disable_kb_rstFelix Held2021-03-292-0/+6
* soc/amd: move PM_RST_CTRL1 register definition to common acpimmio headerFelix Held2021-03-294-7/+3
* soc/amd/*/gpio: include types.h instead of stdint.h to have size_tFelix Held2021-03-293-3/+3
* soc/amd/common/gpio: add PAD_NF_SCI pad typeFelix Held2021-03-281-2/+13
* soc/amd/picasso/mca: add missing comma in mca_bank_name array of stringsFelix Held2021-03-281-1/+1
* soc/amd/common/block/i2c: Use `size_t` for `num_pins`Angel Pons2021-03-282-3/+4
* soc/amd/common/block/i2c: Fix printf format specifiersAngel Pons2021-03-281-3/+3
* soc/amd/common/block/i2c: fix control flow bugFelix Held2021-03-251-1/+2
* soc/amd/common/block/gpio_defs: Wake from either S0i3 or S3Karthikeyan Ramasubramanian2021-03-251-0/+1
* mb/google/guybrush: disable KBRSTENKangheui Won2021-03-241-0/+1
* soc/amd/cezanne: select HAVE_EM100_SUPPORTFelix Held2021-03-231-0/+1
* soc/amd/common/block/gpio_defs: Support wake and debounce configurationKarthikeyan Ramasubramanian2021-03-231-0/+6
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-22 00:53:26 +0000