| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/intel/alderlake: Fix GPIO reset mapping as per GPIO BWG | Subrata Banik | 2022-01-06 | 1 | -23/+23 |
| * | soc/intel/alderlake: enable gpio locking | Nick Vaccaro | 2021-12-07 | 1 | -0/+57 |
| * | soc/intel/alderlake: set lock offset for gpio pad communities | Nick Vaccaro | 2021-10-26 | 1 | -0/+5 |
| * | soc/intel/alderlake: Add virtual GPIOs for community 1 | Maulik V Vaghela | 2021-07-15 | 1 | -1/+4 |
| * | soc/intel/alderlake: Add known GPIO virtual wire information | Deepti Deshatty | 2021-05-14 | 1 | -0/+27 |
| * | soc/intel/alderlake: Add known CPU Port IDs for GPIO communities | Deepti Deshatty | 2021-05-14 | 1 | -0/+5 |
| * | soc/intel/alderlake: Add GPIO definition for CPU PCIe vGPIO | Maulik V Vaghela | 2021-05-05 | 1 | -1/+24 |
| * | soc/intel/alderlake: Correct GPE DWx assignment as per EDS | Subrata Banik | 2021-03-27 | 1 | -2/+0 |
| * | soc/intel/alderlake: Add GPIOs for Alder Lake SOC | Subrata Banik | 2020-09-27 | 1 | -0/+188 |
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| Coreboot firmware sources | coreboot |
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